[llvm] r332147 - AMDGPU/SI: Don't promote alloca to vector for AddrSpaceCast instruction.

[Changpeng Fang via llvm-commits]

Author: chfang
Date: Fri May 11 15:17:57 2018
New Revision: 332147

URL: http://llvm.org/viewvc/llvm-project?rev=332147&view=rev
Log:
AMDGPU/SI: Don't promote alloca to vector for AddrSpaceCast instruction.

Summary:
  We have no logic to promote alloca to vector for an AddrSpaceCast instruction.

Reviewer:
  arsenm

Differential Revision:
  https://reviews.llvm.org/D45993

Added:
    llvm/trunk/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp?rev=332147&r1=332146&r2=332147&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp Fri May 11 15:17:57 2018
@@ -328,7 +328,6 @@ static bool canVectorizeInst(Instruction
     return isa<GetElementPtrInst>(LI->getPointerOperand()) && !LI->isVolatile();
   }
   case Instruction::BitCast:
-  case Instruction::AddrSpaceCast:
     return true;
   case Instruction::Store: {
     // Must be the stored pointer operand, not a stored value, plus

Added: llvm/trunk/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll?rev=332147&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/vector-alloca-addrspacecast.ll Fri May 11 15:17:57 2018
@@ -0,0 +1,27 @@
+; RUN: opt -S -mtriple=amdgcn-- -data-layout=A5 -amdgpu-promote-alloca -sroa -instcombine < %s | FileCheck -check-prefix=OPT %s
+
+; Should give up promoting alloca to vector with an addrspacecast.
+
+; OPT-LABEL: @vector_addrspacecast(
+; OPT: alloca [3 x i32]
+; OPT: store i32 0, i32 addrspace(5)* %a0, align 4
+; OPT: store i32 1, i32 addrspace(5)* %a1, align 4
+; OPT: store i32 2, i32 addrspace(5)* %a2, align 4
+; OPT: %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
+; OPT: %ac = addrspacecast i32 addrspace(5)* %tmp to i32*
+; OPT: %data = load i32, i32* %ac, align 4
+define amdgpu_kernel void @vector_addrspacecast(i32 addrspace(1)* %out, i64 %index) {
+entry:
+  %alloca = alloca [3 x i32], addrspace(5)
+  %a0 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 0
+  %a1 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 1
+  %a2 = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i32 0, i32 2
+  store i32 0, i32 addrspace(5)* %a0
+  store i32 1, i32 addrspace(5)* %a1
+  store i32 2, i32 addrspace(5)* %a2
+  %tmp = getelementptr [3 x i32], [3 x i32] addrspace(5)* %alloca, i64 0, i64 %index
+  %ac = addrspacecast i32 addrspace(5)* %tmp to i32 *
+  %data = load i32, i32 * %ac
+  store i32 %data, i32 addrspace(1)* %out
+  ret void
+}