[PATCH] D46655: [AArch64] Improve single vector lane stores
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 11 12:36:35 PDT 2018
efriedma added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:2256
defm : VecROStoreLane0Pat<ro32, truncstorei32, v4i32, i32, ssub, STRSroW, STRSroX>;
- defm : VecROStoreLane0Pat<ro32, store , v4i32, i32, ssub, STRSroW, STRSroX>;
- defm : VecROStoreLane0Pat<ro32, store , v4f32, f32, ssub, STRSroW, STRSroX>;
- defm : VecROStoreLane0Pat<ro64, store , v2i64, i64, dsub, STRDroW, STRDroX>;
- defm : VecROStoreLane0Pat<ro64, store , v2f64, f64, dsub, STRDroW, STRDroX>;
+ defm : VecROStoreLane0Pat<ro32, store, v4i32, i32, ssub, STRSroW, STRSroX>;
+ defm : VecROStoreLane0Pat<ro32, store, v4f32, f32, ssub, STRSroW, STRSroX>;
----------------
evandro wrote:
> evandro wrote:
> > efriedma wrote:
> > > The `VecROStoreLane0Pat<ro8, store, v16i8`, `VecROStoreLane0Pat<ro16, store, v8i16`, and `VecROStoreLane0Pat<ro32, truncstorei32, v4i32` patterns will never match. And there's a missing truncstorei8 pattern.
> > True, except for `VecROStoreLane0Pat<ro8, ...`, since `FPR8`, used by `STRBro{W,X}`, can only contain `untyped`.
> Or do you mean like so?
>
> ` defm : VecStoreULane0Pat<truncstorei8, v8i16, i32, hsub, STURBi>;
> defm : VecStoreULane0Pat<truncstorei16, v8i16, i32, hsub, STURHi>;
> defm : VecStoreULane0Pat<store, v8f16, f16, hsub, STURHi>;
> defm : VecStoreULane0Pat<truncstorei8, v4i32, i32, ssub, STURBi>;
> defm : VecStoreULane0Pat<truncstorei16, v4i32, i32, ssub, STURHi>;
> defm : VecStoreULane0Pat<truncstorei32, v4i32, i32, ssub, STURSi>;`
>
I'm not sure where you're going with your suggestion.
Due to legalization, the result of a vector_extract can't be i8 or i16; the patterns need to account for that.
https://reviews.llvm.org/D46655
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