[PATCH] D46536: [Power9]Legalize and emit code for W vector extract and convert to Quad-Precision

[Lei Huang via Phabricator via llvm-commits]

lei added inline comments.


================
Comment at: lib/Target/PowerPC/PPCInstrVSX.td:3165
                       (EXTRACT_SUBREG (XXPERMDI $src, $src, 3), sub_64)))>;
-  }
+
+    // (Un)Signed Word vector extract -> QP
----------------
lei wrote:
> nemanjai wrote:
> > This probably needs `let Predicates = [IsBigEndian, HasP9Vector]` right?
> This is within a `Predicates = [HasP9Vector]` section so is not needed here.
will add!


================
Comment at: lib/Target/PowerPC/PPCInstrVSX.td:3194
               (f128 (XSCVUDQP (COPY_TO_REGCLASS $src, VFRC)))>;
-  }
+
+    // (Un)Signed Word vector extract -> QP
----------------
lei wrote:
> nemanjai wrote:
> > Same note regarding the predicate.
> this is within a `Predicates = [HasP9Vector]` code section.
will add!


https://reviews.llvm.org/D46536