[PATCH] D46744: AMDGPU: Make undef legal for v2i16/v2f16

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 11 01:22:15 PDT 2018


arsenm created this revision.
arsenm added reviewers: rampitec, kzhuravl, cfang.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng.

This is apparently necessary to stop undef from being
turned into a build_vector of 0s.


https://reviews.llvm.org/D46744

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll


Index: test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
===================================================================
--- test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
+++ test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
@@ -23,12 +23,9 @@
   ret void
 }
 
-; FIXME: Folds to 0 on gfx9
 ; GCN-LABEL: {{^}}s_cvt_pkrtz_undef_undef:
 ; GCN-NEXT: ; %bb.0
-; SI-NEXT: s_endpgm
-; VI-NEXT: s_endpgm
-; GFX9: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}}
+; GCN-NEXT: s_endpgm
 define amdgpu_kernel void @s_cvt_pkrtz_undef_undef(<2 x half> addrspace(1)* %out) #0 {
   %result = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float undef, float undef)
   store <2 x half> %result, <2 x half> addrspace(1)* %out
Index: lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- lib/Target/AMDGPU/SIISelLowering.cpp
+++ lib/Target/AMDGPU/SIISelLowering.cpp
@@ -441,6 +441,9 @@
     setOperationAction(ISD::Constant, MVT::v2i16, Legal);
     setOperationAction(ISD::ConstantFP, MVT::v2f16, Legal);
 
+    setOperationAction(ISD::UNDEF, MVT::v2i16, Legal);
+    setOperationAction(ISD::UNDEF, MVT::v2f16, Legal);
+
     setOperationAction(ISD::STORE, MVT::v2i16, Promote);
     AddPromotedToType(ISD::STORE, MVT::v2i16, MVT::i32);
     setOperationAction(ISD::STORE, MVT::v2f16, Promote);


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