[PATCH] D46655: [AArch64] Improve single vector lane stores

[Evandro Menezes via Phabricator via llvm-commits]

evandro added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:2256
   defm : VecROStoreLane0Pat<ro32, truncstorei32, v4i32, i32, ssub, STRSroW, STRSroX>;
-  defm : VecROStoreLane0Pat<ro32,      store   , v4i32, i32, ssub, STRSroW, STRSroX>;
-  defm : VecROStoreLane0Pat<ro32,      store   , v4f32, f32, ssub, STRSroW, STRSroX>;
-  defm : VecROStoreLane0Pat<ro64,      store   , v2i64, i64, dsub, STRDroW, STRDroX>;
-  defm : VecROStoreLane0Pat<ro64,      store   , v2f64, f64, dsub, STRDroW, STRDroX>;
+  defm : VecROStoreLane0Pat<ro32,         store, v4i32, i32, ssub, STRSroW, STRSroX>;
+  defm : VecROStoreLane0Pat<ro32,         store, v4f32, f32, ssub, STRSroW, STRSroX>;
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efriedma wrote:
> The `VecROStoreLane0Pat<ro8, store, v16i8`, `VecROStoreLane0Pat<ro16, store, v8i16`, and `VecROStoreLane0Pat<ro32, truncstorei32, v4i32` patterns will never match.  And there's a missing truncstorei8 pattern.
True, except for `VecROStoreLane0Pat<ro8, ...`, since `FPR8`, used by `STRBro{W,X}`, can only contain `untyped`.


https://reviews.llvm.org/D46655