[PATCH] D46528: [DAGCombine][X86][AArch64] Masked merge unfolding: vector edition.
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 10 10:04:04 PDT 2018
spatel added inline comments.
================
Comment at: lib/Target/AArch64/AArch64ISelLowering.h:453-459
+ bool hasAndNotCompare(SDValue Y) const override {
+ EVT VT = Y.getValueType();
+
+ if (VT.isVector())
+ return false;
+
+ return hasAndNot(Y);
----------------
spatel wrote:
> No need to change hasAndNotCompare? Seem clearer to just "return true" as we do today.
Oops...the current code isn't correct. It should be:
bool hasAndNotCompare(SDValue V) const override {
// We can use bics for any scalar.
return V.getValueType().isVector();
}
Repository:
rL LLVM
https://reviews.llvm.org/D46528
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