[PATCH] D46221: [RISCV] Implement MC layer support for the tail pseudoinstruction

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

Thanks Mandeep, just a few minor cleanups



================
Comment at: lib/Target/RISCV/RISCVISelLowering.cpp:1423-1424
     return "RISCVISD::SplitF64";
+  case RISCVISD::TAIL:
+    return "RISCVISD::TAIL";
   }
----------------
This change is needed for codegen rather than MC and should go in D45395


================
Comment at: lib/Target/RISCV/RISCVISelLowering.h:32
+  SplitF64,
+  TAIL
 };
----------------
This change is needed for codegen rather than MC and should go in D45395


================
Comment at: lib/Target/RISCV/RISCVInstrInfo.td:41-43
+def Tail         : SDNode<"RISCVISD::TAIL", SDT_RISCVCall,
+                          [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
+                           SDNPVariadic]>;
----------------
This change is needed for codegen rather than MC and should go in D45395


================
Comment at: lib/Target/RISCV/RISCVInstrInfo.td:666
+// Define AsmString to print "tail" when compile with -S flag.
+let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [X2],
+    isCodeGenOnly = 0 in
----------------
Do we actually need Uses = [X2]?


================
Comment at: lib/Target/RISCV/RISCVInstrInfo.td:672-675
+def : Pat<(Tail (iPTR tglobaladdr:$dst)),
+          (PseudoTAIL texternalsym:$dst)>;
+def : Pat<(Tail (iPTR texternalsym:$dst)),
+          (PseudoTAIL texternalsym:$dst)>;
----------------
This change is needed for codegen rather than MC and should go in D45395


================
Comment at: test/MC/RISCV/tail-call-invalid.s:1
+# RUN: not llvm-mc -triple riscv32 < %s 2>&1 | FileCheck %s
+
----------------
Please add a riscv64 RUN line


================
Comment at: test/MC/RISCV/tail-call.s:7
+# RUN:   | FileCheck -check-prefix=FIXUP %s
+
+.long foo
----------------
Please add riscv64 RUN lines


https://reviews.llvm.org/D46221