[PATCH] D46008: [X86][AArch64][NFC] Add tests for vector masked merge unfolding

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


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Comment at: test/CodeGen/X86/machine-cp.ll:13
 ; CHECK-NEXT:  ## %bb.2: ## %while.body.preheader
-; CHECK-NEXT:  movl %esi, %edx
+; CHECK-NEXT:    movl %esi, %edx
 ; CHECK-NEXT:    .p2align 4, 0x90
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Unrelated white-space diff? This patch is NFC already, so I think it's ok to keep this here or separate if I'm missing something.


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Comment at: test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-sse,-sse2 < %s | FileCheck %s --check-prefix=CHECK-BASELINE
+; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,-sse2 < %s | FileCheck %s --check-prefix=CHECK-SSE
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Why is this config interesting? IMO, it just distracts from the cases that we do care about, but I may not be seeing it.


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Comment at: test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll:731-733
+; ============================================================================ ;
+; 128-bit vector width
+; ============================================================================ ;
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I still doubt the value of everything above here (illegal vector types), but if you think it shows/proves something...


Repository:
  rL LLVM

https://reviews.llvm.org/D46008