[PATCH] D46591: [AArch64] Fix performPostLD1Combine to check for constant lane index.

[Sam Parker via Phabricator via llvm-commits]

samparker added inline comments.


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Comment at: lib/Target/AArch64/AArch64ISelLowering.cpp:9938
+    Lane = N->getOperand(2);
+    if (!isa<ConstantSDNode>(Lane))
+      return SDValue();
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Should the value of Lane also be checked for legality?


Repository:
  rL LLVM

https://reviews.llvm.org/D46591