[llvm] r331773 - [X86] Tag PCONFIG instruction with WriteSystem scheduler class

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Tue May  8 08:55:14 2018
New Revision: 331773

URL: http://llvm.org/viewvc/llvm-project?rev=331773&view=rev
Log:
[X86] Tag PCONFIG instruction with WriteSystem scheduler class

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSystem.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=331773&r1=331772&r2=331773&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Tue May  8 08:55:14 2018
@@ -715,6 +715,8 @@ def PTWRITE64r : RI<0xAE, MRM4r, (outs),
 //   indicated in RAX with ZF set to 1 and CF, PF, AF, OF, and SF are cleared."
 // Thus all these mentioned registers are considered clobbered.
 
+let SchedRW = [WriteSystem] in {
 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX, RDX, EFLAGS] in
     def PCONFIG : I<0x01, MRM_C5, (outs), (ins), "pconfig", []>, TB,
                   Requires<[HasPCONFIG]>;
+} // SchedRW
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