[llvm] r331695 - Follow Up on [MachineVerifier][GlobalISel] NFC, Improving MO printing and refactoring visitMachineInstrBefore
Roman Tereshin via llvm-commits
llvm-commits at lists.llvm.org
Mon May 7 16:14:01 PDT 2018
Author: rtereshin
Date: Mon May 7 16:14:00 2018
New Revision: 331695
URL: http://llvm.org/viewvc/llvm-project?rev=331695&view=rev
Log:
Follow Up on [MachineVerifier][GlobalISel] NFC, Improving MO printing and refactoring visitMachineInstrBefore
Fixing accidentally broken CodeGen/X86/verifier-generic-types-1.mir test
Modified:
llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir
Modified: llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir?rev=331695&r1=331694&r2=331695&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir (original)
+++ llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir Mon May 7 16:14:00 2018
@@ -5,19 +5,11 @@
# CHECK: Bad machine code: Generic instruction is missing a virtual register type
# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_no_mismatches
# CHECK-NEXT: - basic block: %bb.0
-# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:gr64
+# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_
# CHECK-NEXT: - operand 0: %2:gr64
# CHECK-NOT: Type mismatch
-# CHECK: Bad machine code: Generic instruction is missing a virtual register type
-# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_no_mismatches
-# CHECK-NEXT: - basic block: %bb.0
-# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:gr64
-# CHECK-NEXT: - operand 2: %1:gr64
-
-# CHECK-NOT: Type mismatch
-
---
name: first_type_of_a_type_index_missing_and_no_mismatches
tracksRegLiveness: true
@@ -26,7 +18,7 @@ body: |
liveins: $rdi, $rsi
%0:_(s64) = COPY $rdi
- %1:gr64 = COPY $rsi
+ %1:_(s64) = COPY $rsi
%2:gr64 = G_ADD %0, %1
$rax = COPY %2
...
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