[PATCH] D46336: [InstCombine] Apply binary operator simplifications to associative/commutative cases.

Hiroshi Yamauchi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 7 15:49:36 PDT 2018


yamauchi added a comment.

In https://reviews.llvm.org/D46336#1089012, @lebedev.ri wrote:

> Having looked through https://reviews.llvm.org/D45842, i find this differential rather more complex.
>  Maybe instcombine shouldn't be doing this..
>
> It would be interesting to know which of these testcase *aren't* handled by https://reviews.llvm.org/D45842.


Input:

  define i1 @bit-check-combine1(i32 %a, i32 %b) {
  entry:
    %0 = and i32 %a, 1
    %1 = icmp eq i32 %0, 0
    %2 = and i32 %a, 2
    %3 = icmp eq i32 %2, 0
    %4 = and i32 %a, 4
    %5 = icmp eq i32 %4, 0
    %6 = and i32 %b, 8
    %7 = icmp eq i32 %6, 0
    %8 = and i32 %b, 16
    %9 = icmp eq i32 %8, 0
    %10 = and i32 %b, 32
    %11 = icmp eq i32 %10, 0
    %12 = and i1 %1, %3
    %13 = and i1 %12, %5
    %14 = and i1 %13, %7
    %15 = and i1 %14, %9
    %16 = and i1 %15, %11
    ret i1 %16
  }

After -instcombine (no patch)

  define i1 @bit-check-combine1(i32 %a, i32 %b) {
  entry:
    %0 = and i32 %b, 8
    %1 = and i32 %b, 16
    %2 = and i32 %b, 32
    %3 = and i32 %a, 7
    %4 = or i32 %3, %0
    %5 = or i32 %4, %1
    %6 = or i32 %5, %2
    %7 = icmp eq i32 %6, 0
    ret i1 %7
  }

After -instcombine, with this patch

  define i1 @bit-check-combine1(i32 %a, i32 %b) {
  entry:
    %0 = and i32 %a, 7
    %1 = and i32 %b, 56
    %2 = or i32 %0, %1
    %3 = icmp eq i32 %2, 0
    ret i1 %3
  }

After -instcombine, with https://reviews.llvm.org/D45842

  define i1 @bit-check-combine1(i32 %a, i32 %b) {
  entry:
    %0 = and i32 %b, 8
    %1 = and i32 %b, 16
    %2 = and i32 %b, 32
    %3 = and i32 %a, 7
    %4 = or i32 %3, %0
    %5 = or i32 %4, %1
    %6 = or i32 %5, %2
    %7 = icmp eq i32 %6, 0
    ret i1 %7
  }

After -instcombine -reassociate, with https://reviews.llvm.org/D45842

  define i1 @bit-check-combine1(i32 %a, i32 %b) {
  entry:
    %0 = and i32 %b, 8
    %1 = and i32 %b, 16
    %2 = and i32 %b, 32
    %3 = and i32 %a, 7
    %4 = or i32 %0, %3
    %5 = or i32 %1, %2
    %6 = or i32 %5, %4
    %7 = icmp eq i32 %6, 0
    ret i1 %7
  }

After -instcombine -reassociate -instcombine, with https://reviews.llvm.org/D45842

  define i1 @bit-check-combine1(i32 %a, i32 %b) {
  entry:
    %0 = and i32 %b, 8
    %1 = and i32 %a, 7
    %2 = or i32 %0, %1
    %3 = and i32 %b, 48
    %4 = or i32 %3, %2
    %5 = icmp eq i32 %4, 0
    ret i1 %5
  }




Repository:
  rL LLVM

https://reviews.llvm.org/D46336





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