[llvm] r331694 - [MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all vregs
Roman Tereshin via llvm-commits
llvm-commits at lists.llvm.org
Mon May 7 15:31:48 PDT 2018
Author: rtereshin
Date: Mon May 7 15:31:47 2018
New Revision: 331694
URL: http://llvm.org/viewvc/llvm-project?rev=331694&view=rev
Log:
[MachineVerifier][GlobalISel] Checking that generic instrs have LLTs on all vregs
Every generic machine instruction must have generic virtual registers
only, that is, have a low-level type attached to each operand.
Previously MachineVerifier would catch a type missing on an operand
only if the previous operand for the the same type index exists and
have a type attached to it and it will report it as a type mismatch.
This is incosistent behaviour and a misleading error message.
This commit makes sure MachineVerifier explicitly checks that the
types are there for every operand and if not provides a
straightforward error message.
Reviewers: qcolombet t.p.northover bogner ab
Reviewed By: qcolombet
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D46455
Modified:
llvm/trunk/lib/CodeGen/MachineInstr.cpp
llvm/trunk/lib/CodeGen/MachineVerifier.cpp
llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir
llvm/trunk/test/CodeGen/X86/verifier-generic-types-2.mir
Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=331694&r1=331693&r2=331694&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Mon May 7 15:31:47 2018
@@ -1224,8 +1224,12 @@ LLT MachineInstr::getTypeToPrint(unsigne
if (PrintedTypes[OpInfo.getGenericTypeIndex()])
return LLT{};
- PrintedTypes.set(OpInfo.getGenericTypeIndex());
- return MRI.getType(Op.getReg());
+ LLT TypeToPrint = MRI.getType(Op.getReg());
+ // Don't mark the type index printed if it wasn't actually printed: maybe
+ // another operand with the same type index has an actual type attached:
+ if (TypeToPrint.isValid())
+ PrintedTypes.set(OpInfo.getGenericTypeIndex());
+ return TypeToPrint;
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
Modified: llvm/trunk/lib/CodeGen/MachineVerifier.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineVerifier.cpp?rev=331694&r1=331693&r2=331694&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineVerifier.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineVerifier.cpp Mon May 7 15:31:47 2018
@@ -930,16 +930,26 @@ void MachineVerifier::visitMachineInstrB
const MachineOperand *MO = &MI->getOperand(I);
LLT OpTy = MRI->getType(MO->getReg());
- if (Types[TypeIdx].isValid() && Types[TypeIdx] != OpTy)
- report("type mismatch in generic instruction", MI);
- Types[TypeIdx] = OpTy;
+ // Don't report a type mismatch if there is no actual mismatch, only a
+ // type missing, to reduce noise:
+ if (OpTy.isValid()) {
+ // Only the first valid type for a type index will be printed: don't
+ // overwrite it later so it's always clear which type was expected:
+ if (!Types[TypeIdx].isValid())
+ Types[TypeIdx] = OpTy;
+ else if (Types[TypeIdx] != OpTy)
+ report("Type mismatch in generic instruction", MO, I, OpTy);
+ } else {
+ // Generic instructions must have types attached to their operands.
+ report("Generic instruction is missing a virtual register type", MO, I);
+ }
}
// Generic opcodes must not have physical register operands.
for (unsigned I = 0; I < MI->getNumOperands(); ++I) {
const MachineOperand *MO = &MI->getOperand(I);
if (MO->isReg() && TargetRegisterInfo::isPhysicalRegister(MO->getReg()))
- report("Generic instruction cannot have physical register", MI);
+ report("Generic instruction cannot have physical register", MO, I);
}
}
Modified: llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir?rev=331694&r1=331693&r2=331694&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir (original)
+++ llvm/trunk/test/CodeGen/X86/verifier-generic-types-1.mir Mon May 7 15:31:47 2018
@@ -1,5 +1,22 @@
-# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1
-# XFAIL: *
+# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+
+# CHECK-NOT: Type mismatch
+
+# CHECK: Bad machine code: Generic instruction is missing a virtual register type
+# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_no_mismatches
+# CHECK-NEXT: - basic block: %bb.0
+# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:gr64
+# CHECK-NEXT: - operand 0: %2:gr64
+
+# CHECK-NOT: Type mismatch
+
+# CHECK: Bad machine code: Generic instruction is missing a virtual register type
+# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_no_mismatches
+# CHECK-NEXT: - basic block: %bb.0
+# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:gr64
+# CHECK-NEXT: - operand 2: %1:gr64
+
+# CHECK-NOT: Type mismatch
---
name: first_type_of_a_type_index_missing_and_no_mismatches
Modified: llvm/trunk/test/CodeGen/X86/verifier-generic-types-2.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/verifier-generic-types-2.mir?rev=331694&r1=331693&r2=331694&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/verifier-generic-types-2.mir (original)
+++ llvm/trunk/test/CodeGen/X86/verifier-generic-types-2.mir Mon May 7 15:31:47 2018
@@ -1,9 +1,16 @@
# RUN: not llc -o - %s -mtriple=x86_64-- -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
-# CHECK: Bad machine code: type mismatch in generic instruction
+# CHECK: Bad machine code: Generic instruction is missing a virtual register type
# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_a_mismatch
# CHECK-NEXT: - basic block: %bb.0
-# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_, %1:_
+# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_
+# CHECK-NEXT: - operand 0: %2:gr64
+
+# CHECK: Bad machine code: Type mismatch in generic instruction
+# CHECK-NEXT: - function: first_type_of_a_type_index_missing_and_a_mismatch
+# CHECK-NEXT: - basic block: %bb.0
+# CHECK-NEXT: - instruction: %2:gr64 = G_ADD %0:_(s64), %1:_
+# CHECK-NEXT: - operand 2: %1:_(s32)
---
name: first_type_of_a_type_index_missing_and_a_mismatch
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