[PATCH] D46494: [DAGCombiner] Masked merge: enhance handling of 'andn' with immediates

Phabricator via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 7 14:57:46 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL331685: [DAGCombiner] Masked merge: enhance handling of 'andn' with immediates (authored by lebedevri, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D46494?vs=145493&id=145556#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D46494

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll


Index: llvm/trunk/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
+++ llvm/trunk/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
@@ -657,10 +657,9 @@
 ;
 ; CHECK-BMI-LABEL: in_constant_varx_42:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    xorl $42, %edi
-; CHECK-BMI-NEXT:    andl %edx, %edi
-; CHECK-BMI-NEXT:    xorl $42, %edi
-; CHECK-BMI-NEXT:    movl %edi, %eax
+; CHECK-BMI-NEXT:    andnl %edx, %edi, %eax
+; CHECK-BMI-NEXT:    orl $42, %edx
+; CHECK-BMI-NEXT:    andnl %edx, %eax, %eax
 ; CHECK-BMI-NEXT:    retq
   %n0 = xor i32 %x, 42 ; %x
   %n1 = and i32 %n0, %mask
@@ -704,9 +703,10 @@
 ;
 ; CHECK-BMI-LABEL: in_constant_varx_42_invmask:
 ; CHECK-BMI:       # %bb.0:
-; CHECK-BMI-NEXT:    xorl $42, %edi
-; CHECK-BMI-NEXT:    andnl %edi, %edx, %eax
-; CHECK-BMI-NEXT:    xorl $42, %eax
+; CHECK-BMI-NEXT:    notl %edx
+; CHECK-BMI-NEXT:    andnl %edx, %edi, %eax
+; CHECK-BMI-NEXT:    orl $42, %edx
+; CHECK-BMI-NEXT:    andnl %edx, %eax, %eax
 ; CHECK-BMI-NEXT:    retq
   %notmask = xor i32 %mask, -1
   %n0 = xor i32 %x, 42 ; %x
Index: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -5372,6 +5372,9 @@
 //    |  D  |
 // Into:
 //   (x & m) | (y & ~m)
+// If y is a constant, and the 'andn' does not work with immediates,
+// we unfold into a different pattern:
+//   ~(~x & m) & (m | y)
 // NOTE: we don't unfold the pattern if 'xor' is actually a 'not', because at
 //       the very least that breaks andnpd / andnps patterns, and because those
 //       patterns are simplified in IR and shouldn't be created in the DAG
@@ -5428,12 +5431,19 @@
   if (!TLI.hasAndNot(M))
     return SDValue();
 
-  // If Y is a constant, check that 'andn' works with immediates.
-  if (!TLI.hasAndNot(Y))
-    return SDValue();
-
   SDLoc DL(N);
 
+  // If Y is a constant, check that 'andn' works with immediates.
+  if (!TLI.hasAndNot(Y)) {
+    assert(TLI.hasAndNot(X) && "Only mask is a variable? Unreachable.");
+    // If not, we need to do a bit more work to make sure andn is still used.
+    SDValue NotX = DAG.getNOT(DL, X, VT);
+    SDValue LHS = DAG.getNode(ISD::AND, DL, VT, NotX, M);
+    SDValue NotLHS = DAG.getNOT(DL, LHS, VT);
+    SDValue RHS = DAG.getNode(ISD::OR, DL, VT, M, Y);
+    return DAG.getNode(ISD::AND, DL, VT, NotLHS, RHS);
+  }
+
   SDValue LHS = DAG.getNode(ISD::AND, DL, VT, X, M);
   SDValue NotM = DAG.getNOT(DL, M, VT);
   SDValue RHS = DAG.getNode(ISD::AND, DL, VT, Y, NotM);


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