[PATCH] D46276: [CostModel][X86] Derive TTI costs from complete scheduling models (PR36550) (RFC)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

In https://reviews.llvm.org/D46276#1089554, @courbet wrote:

> > 2 - The patch embeds likely code sequences into the cost tables; this is going to get very bulkly very quickly, as we need to provide sequences for a number of ISAs, as well as keeping default costs until we have full scheduler model coverage.
>
> Isn't that essentially duplicating information from instruction selection ? How hard would it be to generate the code snippets automatically ? 
>  It could be done at runtime (something like: generate a "template" vectorized Instruction and lower it in a dummy context to get the MIOp sequence), or maybe even at compile time (not saying it's easy but theoretically we have all the information to do that).


It won't be easy to accomplish. 1:1 mappings are straightforward enough in principle, but are likely to require a lot of refactoring. The complex code sequences (shifts, 256-bit vector integers on AVX1 etc.) are not something that we are even close to having in tablegen form for reuse. GlobalIsel might be able to help some day but I can't see it being useful anytime soon.


Repository:
  rL LLVM

https://reviews.llvm.org/D46276