[PATCH] D46310: [AArch64] Disallow vector operand if FPR128 Q register is required.

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon May 7 03:09:05 PDT 2018

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aemerson accepted this revision.
aemerson added a comment.
This revision is now accepted and ready to land.

Thanks, LGTM.


https://reviews.llvm.org/D46310

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