[llvm] r331549 - [MachineLICM] Debug intrinsics shouldn't affect hoist decisions

[Geoff Berry via llvm-commits]

Author: gberry
Date: Fri May  4 12:25:09 2018
New Revision: 331549

URL: http://llvm.org/viewvc/llvm-project?rev=331549&view=rev
Log:
[MachineLICM] Debug intrinsics shouldn't affect hoist decisions

Summary:
When checking if an instruction stores to a given frame index, check
that the instruction can write to memory before looking at the memory
operands list to avoid e.g. DBG_VALUE instructions that reference a
frame index preventing a load from that index from being hoisted.

Reviewers: dblaikie, MatzeB, qcolombet, reames, javed.absar

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D46284

Added:
    llvm/trunk/test/CodeGen/AArch64/mlicm-stack-write-check.mir
Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=331549&r1=331548&r2=331549&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Fri May  4 12:25:09 2018
@@ -374,6 +374,10 @@ bool MachineLICMBase::runOnMachineFuncti
 
 /// Return true if instruction stores to the specified frame.
 static bool InstructionStoresToFI(const MachineInstr *MI, int FI) {
+  // Check mayStore before memory operands so that e.g. DBG_VALUEs will return
+  // true since they have no memory operands.
+  if (!MI->mayStore())
+     return false;
   // If we lost memory operands, conservatively assume that the instruction
   // writes to all slots.
   if (MI->memoperands_empty())

Added: llvm/trunk/test/CodeGen/AArch64/mlicm-stack-write-check.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/mlicm-stack-write-check.mir?rev=331549&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/mlicm-stack-write-check.mir (added)
+++ llvm/trunk/test/CodeGen/AArch64/mlicm-stack-write-check.mir Fri May  4 12:25:09 2018
@@ -0,0 +1,32 @@
+# RUN: llc -mtriple=aarch64 -run-pass machinelicm -verify-machineinstrs -o - %s | FileCheck %s
+---
+name: test
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: gpr64 }
+stack:
+  - { id: 0, size: 8, type: spill-slot }
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test
+    ; CHECK-LABEL: bb.0:
+    ; CHECK: $x2 = LDRXui %stack.0, 0
+    liveins: $x0, $x1, $x2
+    B %bb.1
+
+  bb.1:
+    ; CHECK-LABEL: bb.1:
+    ; CHECK-NOT: $x2 = LDRXui %stack.0, 0
+    liveins: $x0
+    DBG_VALUE %stack.0, 0
+    $x2 = LDRXui %stack.0, 0 :: (load 8 from %stack.0)
+    $x0 = ADDXrr $x0, $x2
+    $xzr = SUBSXri $x0, 1, 0, implicit-def $nzcv
+    Bcc 11, %bb.1, implicit $nzcv
+    B %bb.2
+
+  bb.2:
+    liveins: $x0
+    %0 = COPY $x0
+    %0 = COPY $x0  ; Force isSSA = false.
+...