[PATCH] D46399: Skip blocks with no predecessors for CFIInstrInserter verify
Petar Jovanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 3 15:52:54 PDT 2018
petarj added a comment.
In https://reviews.llvm.org/D46399#1086801, @craig.topper wrote:
> This fix fixes the original case, but its easy to break it again
>
> target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
> target triple = "x86_64-unknown-linux-gnu"
>
> ; Function Attrs: noinline nounwind optnone uwtable
> define hidden void @foo() #0 {
> bb:
> br label %bb1
>
> bb1: ; preds = %bb3, %bb
> %tmp = icmp ne i32 0, 0
> br i1 %tmp, label %bb2, label %bb3
>
> bb2: ; preds = %bb1
> br label %bb4
>
> bb4: ; preds = %bb2
> br label %bb3
>
> bb3: ; preds = %bb4, %bb1
> br label %bb1
> }
>
> attributes #0 = { noinline nounwind optnone uwtable "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" }
>
Does this example come from a real test case? The issue here is that bb2 will not have predecessors after X86 DAG->DAG Instruction Selection, and this way we reach bb4 from either:
bb0->bb1->bb4 or
bb2->bb3->bb4.
What should be a correct offset for bb4 in this case?
Repository:
rL LLVM
https://reviews.llvm.org/D46399
More information about the llvm-commits
mailing list