[PATCH] D46298: AMDGPU: Remove deadcode in isSDNodeSourceOfDivergence()
Alexander via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 3 04:49:40 PDT 2018
alex-t added a comment.
Could you please clarify - why do you consider that check meaningless for r600?
I see that this line : " const SISubtarget &ST = MF->getSubtarget<SISubtarget>(); " is misleading and in fact is not correct.
I'd better check and choose the R600Subtarget or SISubtarget.
If I understand right we need just check which subtarget to retrieve for physregs check.
Since we consider any VGPR formal argument as divergent it does not matter R600 or SI at all.
We need to choose right TargetRegisterInfo (r600 or SI again)
So, for virtual register : if (MRI.isLiveIn(Reg) && TRI.isVGPR(Reg) ) return true
Or I maybe don't know something substantial? :)
Repository:
rL LLVM
https://reviews.llvm.org/D46298
More information about the llvm-commits
mailing list