[PATCH] D46360: [SelectionDAG] Refactor code by adding RegsForValue::getRegsAndSizes(). NFCI

[Vedant Kumar via Phabricator via llvm-commits]

vsk accepted this revision.
vsk added a comment.
This revision is now accepted and ready to land.

Thanks! I can't wait until we're able to use C++17 structured bindings in llvm. It'd be really nice to write 'auto [Reg, Size] = ...', or 'auto [Count, VT] = ...'



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Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h:1057
+
+  /// Populate the OutVec with a list of registers and their sizes.
+  SmallVector<std::pair<unsigned, unsigned>, 4> getRegsAndSizes() const;
----------------
Maybe just 'Return a list ...'?


Repository:
  rL LLVM

https://reviews.llvm.org/D46360