[PATCH] D45986: [AggressiveInstCombine] convert a chain of 'or-shift' bits into masked compare
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 1 10:18:19 PDT 2018
spatel added inline comments.
================
Comment at: lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp:76
+ uint64_t BitIndex = 0;
+ if (!match(V, m_LShr(m_Value(Candidate), m_ConstantInt(BitIndex))))
+ Candidate = V;
----------------
kparzysz wrote:
> You could also match arithmetic shifts-right as long as the shift amount does not move the sign bit into the 0th position. It's not necessary for this patch though.
That's a good point. I am assuming this pass runs after instcombine, and instcombine would transform to lshr as a canonicalization step. This is as it happens currently, but might change as you've proposed.
I'll look at adding a phase-ordering test, so we'll know that we don't lose this optimization if the pass order changes.
https://reviews.llvm.org/D45986
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