[PATCH] D44704: [GlobalISel][X86][ARM] Relaxing type constraints on G_SHL and friends

[Roman Tereshin via Phabricator via llvm-commits]

rtereshin added a comment.

Here's a fine example of the issue mentioned earlier:

This is how we legalize `G_INTTOPTR` for AArch64 right now:

  getActionDefinitionsBuilder(G_INTTOPTR)
      .unsupportedIf([&](const LegalityQuery &Query) {
        return Query.Types[0].getSizeInBits() != Query.Types[1].getSizeInBits();
      })
      .legalFor({s64, p0});

(https://github.com/llvm-mirror/llvm/blob/27c28519031032a11a917fa4dbf05417fbe78740/lib/Target/AArch64/AArch64LegalizerInfo.cpp#L215-L219)

Who can spot a problem?

In fact, 2 problems at once. I'm working on a simple validation for `LegalizerInfo` that would catch this.

SPOILERS below:

a tip, the following MIR:

  --- |
    target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
    target triple = "aarch64--"
    
    define i64 @broken(<4 x i16> %v) {
      %res = bitcast <4 x i16> %v to i64
      ret i64 %res
    }
  
  ...
  ---
  name:            broken
  alignment:       2
  tracksRegLiveness: true
  registers:       
    - { id: 0, class: _ }
    - { id: 1, class: _ }
  body:             |
    bb.1 (%ir-block.0):
      liveins: $d0
    
      %0:_(<4 x s16>) = COPY $d0
      %1:_(s64) = G_INTTOPTR %0(<4 x s16>)
      $x0 = COPY %1(s64)
      RET_ReallyLR implicit $x0
  
  ...

will be successfully legalized by

  ./bin/llc -run-pass=legalizer -verify-machineinstrs -simplify-mir <INPUT>.mir -o -

with the following output:

  --- |
    ; ModuleID = 'out.mir'
    source_filename = "out.mir"
    target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
    target triple = "aarch64--"
    
    define i64 @broken(<4 x i16> %v) {
      %res = bitcast <4 x i16> %v to i64
      ret i64 %res
    }
  
  ...
  ---
  name:            broken
  alignment:       2
  legalized:       true
  tracksRegLiveness: true
  registers:       
    - { id: 0, class: _ }
    - { id: 1, class: _ }
  frameInfo:       
    maxCallFrameSize: 0
  body:             |
    bb.0 (%ir-block.0):
      liveins: $d0
    
      %0:_(<4 x s16>) = COPY $d0
      %1:_(s64) = G_INTTOPTR %0(<4 x s16>)
      $x0 = COPY %1(s64)
      RET_ReallyLR implicit $x0
  
  ...


Repository:
  rL LLVM

https://reviews.llvm.org/D44704