[llvm] r331226 - [InstCombine] add tests, update checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 30 14:03:36 PDT 2018
Author: spatel
Date: Mon Apr 30 14:03:36 2018
New Revision: 331226
URL: http://llvm.org/viewvc/llvm-project?rev=331226&view=rev
Log:
[InstCombine] add tests, update checks; NFC
Modified:
llvm/trunk/test/Transforms/InstCombine/add.ll
Modified: llvm/trunk/test/Transforms/InstCombine/add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/add.ll?rev=331226&r1=331225&r2=331226&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/add.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/add.ll Mon Apr 30 14:03:36 2018
@@ -3,7 +3,7 @@
define i32 @select_0_or_1_from_bool(i1 %x) {
; CHECK-LABEL: @select_0_or_1_from_bool(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i1 %x, true
+; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[X:%.*]], true
; CHECK-NEXT: [[ADD:%.*]] = zext i1 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[ADD]]
;
@@ -14,7 +14,7 @@ define i32 @select_0_or_1_from_bool(i1 %
define <2 x i32> @select_0_or_1_from_bool_vec(<2 x i1> %x) {
; CHECK-LABEL: @select_0_or_1_from_bool_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> %x, <i1 true, i1 true>
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i1> [[X:%.*]], <i1 true, i1 true>
; CHECK-NEXT: [[ADD:%.*]] = zext <2 x i1> [[TMP1]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[ADD]]
;
@@ -27,7 +27,7 @@ define <2 x i32> @select_0_or_1_from_boo
define i32 @flip_and_mask(i32 %x) {
; CHECK-LABEL: @flip_and_mask(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, 1
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 1
; CHECK-NEXT: [[INC:%.*]] = xor i32 [[TMP1]], 1
; CHECK-NEXT: ret i32 [[INC]]
;
@@ -39,7 +39,7 @@ define i32 @flip_and_mask(i32 %x) {
define <2 x i8> @flip_and_mask_splat(<2 x i8> %x) {
; CHECK-LABEL: @flip_and_mask_splat(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> %x, <i8 1, i8 1>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], <i8 1, i8 1>
; CHECK-NEXT: [[INC:%.*]] = xor <2 x i8> [[TMP1]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i8> [[INC]]
;
@@ -51,7 +51,7 @@ define <2 x i8> @flip_and_mask_splat(<2
define i32 @test1(i32 %A) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: ret i32 %A
+; CHECK-NEXT: ret i32 [[A:%.*]]
;
%B = add i32 %A, 0
ret i32 %B
@@ -59,7 +59,7 @@ define i32 @test1(i32 %A) {
define i32 @test2(i32 %A) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: ret i32 %A
+; CHECK-NEXT: ret i32 [[A:%.*]]
;
%B = add i32 %A, 5
%C = add i32 %B, -5
@@ -68,54 +68,53 @@ define i32 @test2(i32 %A) {
define i32 @test3(i32 %A) {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: ret i32 %A
+; CHECK-NEXT: ret i32 [[A:%.*]]
;
%B = add i32 %A, 5
- ;; This should get converted to an add
%C = sub i32 %B, 5
ret i32 %C
}
+; D = B + -A = B - A
define i32 @test4(i32 %A, i32 %B) {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[D:%.*]] = sub i32 %B, %A
+; CHECK-NEXT: [[D:%.*]] = sub i32 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: ret i32 [[D]]
;
%C = sub i32 0, %A
- ; D = B + -A = B - A
%D = add i32 %B, %C
ret i32 %D
}
+; D = -A + B = B - A
define i32 @test5(i32 %A, i32 %B) {
; CHECK-LABEL: @test5(
-; CHECK-NEXT: [[D:%.*]] = sub i32 %B, %A
+; CHECK-NEXT: [[D:%.*]] = sub i32 [[B:%.*]], [[A:%.*]]
; CHECK-NEXT: ret i32 [[D]]
;
%C = sub i32 0, %A
- ; D = -A + B = B - A
%D = add i32 %C, %B
ret i32 %D
}
+; C = 7*A+A == 8*A == A << 3
define i32 @test6(i32 %A) {
; CHECK-LABEL: @test6(
-; CHECK-NEXT: [[C:%.*]] = shl i32 %A, 3
+; CHECK-NEXT: [[C:%.*]] = shl i32 [[A:%.*]], 3
; CHECK-NEXT: ret i32 [[C]]
;
%B = mul i32 7, %A
- ; C = 7*A+A == 8*A == A << 3
%C = add i32 %B, %A
ret i32 %C
}
+; C = A+7*A == 8*A == A << 3
define i32 @test7(i32 %A) {
; CHECK-LABEL: @test7(
-; CHECK-NEXT: [[C:%.*]] = shl i32 %A, 3
+; CHECK-NEXT: [[C:%.*]] = shl i32 [[A:%.*]], 3
; CHECK-NEXT: ret i32 [[C]]
;
%B = mul i32 7, %A
- ; C = A+7*A == 8*A == A << 3
%C = add i32 %A, %B
ret i32 %C
}
@@ -123,8 +122,8 @@ define i32 @test7(i32 %A) {
; (A & C1)+(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
define i32 @test8(i32 %A, i32 %B) {
; CHECK-LABEL: @test8(
-; CHECK-NEXT: [[A1:%.*]] = and i32 %A, 7
-; CHECK-NEXT: [[B1:%.*]] = and i32 %B, 128
+; CHECK-NEXT: [[A1:%.*]] = and i32 [[A:%.*]], 7
+; CHECK-NEXT: [[B1:%.*]] = and i32 [[B:%.*]], 128
; CHECK-NEXT: [[C:%.*]] = or i32 [[A1]], [[B1]]
; CHECK-NEXT: ret i32 [[C]]
;
@@ -136,31 +135,30 @@ define i32 @test8(i32 %A, i32 %B) {
define i32 @test9(i32 %A) {
; CHECK-LABEL: @test9(
-; CHECK-NEXT: [[C:%.*]] = shl i32 %A, 5
+; CHECK-NEXT: [[C:%.*]] = shl i32 [[A:%.*]], 5
; CHECK-NEXT: ret i32 [[C]]
;
%B = shl i32 %A, 4
- ; === shl int %A, 5
%C = add i32 %B, %B
ret i32 %C
}
-define i1 @test10(i8 %A, i8 %b) {
+; a != -b
+define i1 @test10(i8 %a, i8 %b) {
; CHECK-LABEL: @test10(
-; CHECK-NEXT: [[B:%.*]] = sub i8 0, %b
-; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[B]], %A
+; CHECK-NEXT: [[ADD:%.*]] = sub i8 0, [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[ADD]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
- %B = add i8 %A, %b
- ; === A != -b
- %c = icmp ne i8 %B, 0
+ %add = add i8 %a, %b
+ %c = icmp ne i8 %add, 0
ret i1 %c
}
define <2 x i1> @test10vec(<2 x i8> %a, <2 x i8> %b) {
; CHECK-LABEL: @test10vec(
-; CHECK-NEXT: [[C:%.*]] = sub <2 x i8> zeroinitializer, %b
-; CHECK-NEXT: [[D:%.*]] = icmp ne <2 x i8> [[C]], %a
+; CHECK-NEXT: [[C:%.*]] = sub <2 x i8> zeroinitializer, [[B:%.*]]
+; CHECK-NEXT: [[D:%.*]] = icmp ne <2 x i8> [[C]], [[A:%.*]]
; CHECK-NEXT: ret <2 x i1> [[D]]
;
%c = add <2 x i8> %a, %b
@@ -170,18 +168,17 @@ define <2 x i1> @test10vec(<2 x i8> %a,
define i1 @test11(i8 %A) {
; CHECK-LABEL: @test11(
-; CHECK-NEXT: [[C:%.*]] = icmp ne i8 %A, 1
+; CHECK-NEXT: [[C:%.*]] = icmp ne i8 [[A:%.*]], 1
; CHECK-NEXT: ret i1 [[C]]
;
%B = add i8 %A, -1
- ; === A != 1
%c = icmp ne i8 %B, 0
ret i1 %c
}
define <2 x i1> @test11vec(<2 x i8> %a) {
; CHECK-LABEL: @test11vec(
-; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> %a, <i8 1, i8 1>
+; CHECK-NEXT: [[C:%.*]] = icmp ne <2 x i8> [[A:%.*]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%b = add <2 x i8> %a, <i8 -1, i8 -1>
@@ -193,10 +190,10 @@ define <2 x i1> @test11vec(<2 x i8> %a)
define i32 @test12(i32 %A, i32 %B) {
; CHECK-LABEL: @test12(
-; CHECK-NEXT: br label %X
+; CHECK-NEXT: br label [[X:%.*]]
; CHECK: X:
-; CHECK-NEXT: [[C_OK:%.*]] = add i32 %B, %A
-; CHECK-NEXT: [[D:%.*]] = add i32 [[C_OK]], %A
+; CHECK-NEXT: [[C_OK:%.*]] = add i32 [[B:%.*]], [[A:%.*]]
+; CHECK-NEXT: [[D:%.*]] = add i32 [[C_OK]], [[A]]
; CHECK-NEXT: ret i32 [[D]]
;
%C_OK = add i32 %B, %A
@@ -207,25 +204,25 @@ X: ; preds = %0
ret i32 %D
}
+;; TODO: shl A, 1?
define i32 @test13(i32 %A, i32 %B, i32 %C) {
; CHECK-LABEL: @test13(
-; CHECK-NEXT: [[D_OK:%.*]] = add i32 %A, %B
-; CHECK-NEXT: [[E_OK:%.*]] = add i32 [[D_OK]], %C
-; CHECK-NEXT: [[F:%.*]] = add i32 [[E_OK]], %A
+; CHECK-NEXT: [[D_OK:%.*]] = add i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[E_OK:%.*]] = add i32 [[D_OK]], [[C:%.*]]
+; CHECK-NEXT: [[F:%.*]] = add i32 [[E_OK]], [[A]]
; CHECK-NEXT: ret i32 [[F]]
;
%D_OK = add i32 %A, %B
%E_OK = add i32 %D_OK, %C
- ;; shl A, 1
%F = add i32 %E_OK, %A
ret i32 %F
}
define i32 @test14(i32 %offset, i32 %difference) {
; CHECK-LABEL: @test14(
-; CHECK-NEXT: [[TMP_2:%.*]] = and i32 %difference, 3
-; CHECK-NEXT: [[TMP_3_OK:%.*]] = add i32 [[TMP_2]], %offset
-; CHECK-NEXT: [[TMP_5_MASK:%.*]] = and i32 %difference, -4
+; CHECK-NEXT: [[TMP_2:%.*]] = and i32 [[DIFFERENCE:%.*]], 3
+; CHECK-NEXT: [[TMP_3_OK:%.*]] = add i32 [[TMP_2]], [[OFFSET:%.*]]
+; CHECK-NEXT: [[TMP_5_MASK:%.*]] = and i32 [[DIFFERENCE]], -4
; CHECK-NEXT: [[TMP_8:%.*]] = add i32 [[TMP_3_OK]], [[TMP_5_MASK]]
; CHECK-NEXT: ret i32 [[TMP_8]]
;
@@ -237,32 +234,32 @@ define i32 @test14(i32 %offset, i32 %dif
ret i32 %tmp.8
}
+; Only one bit set
define i8 @test15(i8 %A) {
; CHECK-LABEL: @test15(
-; CHECK-NEXT: [[C:%.*]] = and i8 %A, 16
+; CHECK-NEXT: [[C:%.*]] = and i8 [[A:%.*]], 16
; CHECK-NEXT: ret i8 [[C]]
;
%B = add i8 %A, -64
- ; Only one bit set
%C = and i8 %B, 16
ret i8 %C
}
+; Only one bit set
define i8 @test16(i8 %A) {
; CHECK-LABEL: @test16(
-; CHECK-NEXT: [[B:%.*]] = and i8 %A, 16
+; CHECK-NEXT: [[B:%.*]] = and i8 [[A:%.*]], 16
; CHECK-NEXT: [[C:%.*]] = xor i8 [[B]], 16
; CHECK-NEXT: ret i8 [[C]]
;
%B = add i8 %A, 16
- ; Only one bit set
%C = and i8 %B, 16
ret i8 %C
}
define i32 @test17(i32 %A) {
; CHECK-LABEL: @test17(
-; CHECK-NEXT: [[C:%.*]] = sub i32 0, %A
+; CHECK-NEXT: [[C:%.*]] = sub i32 0, [[A:%.*]]
; CHECK-NEXT: ret i32 [[C]]
;
%B = xor i32 %A, -1
@@ -272,7 +269,7 @@ define i32 @test17(i32 %A) {
define i8 @test18(i8 %A) {
; CHECK-LABEL: @test18(
-; CHECK-NEXT: [[C:%.*]] = sub i8 16, %A
+; CHECK-NEXT: [[C:%.*]] = sub i8 16, [[A:%.*]]
; CHECK-NEXT: ret i8 [[C]]
;
%B = xor i8 %A, -1
@@ -282,7 +279,7 @@ define i8 @test18(i8 %A) {
define <2 x i64> @test18vec(<2 x i64> %A) {
; CHECK-LABEL: @test18vec(
-; CHECK-NEXT: [[ADD:%.*]] = sub <2 x i64> <i64 1, i64 2>, %A
+; CHECK-NEXT: [[ADD:%.*]] = sub <2 x i64> <i64 1, i64 2>, [[A:%.*]]
; CHECK-NEXT: ret <2 x i64> [[ADD]]
;
%xor = xor <2 x i64> %A, <i64 -1, i64 -1>
@@ -292,7 +289,7 @@ define <2 x i64> @test18vec(<2 x i64> %A
define i32 @test19(i1 %C) {
; CHECK-LABEL: @test19(
-; CHECK-NEXT: [[V:%.*]] = select i1 %C, i32 1123, i32 133
+; CHECK-NEXT: [[V:%.*]] = select i1 [[C:%.*]], i32 1123, i32 133
; CHECK-NEXT: ret i32 [[V]]
;
%A = select i1 %C, i32 1000, i32 10
@@ -316,7 +313,7 @@ define <2 x i32> @test19vec(i1 %C) {
define i32 @test20(i32 %x) {
; CHECK-LABEL: @test20(
-; CHECK-NEXT: ret i32 %x
+; CHECK-NEXT: ret i32 [[X:%.*]]
;
%y = xor i32 %x, -2147483648
%z = add nsw i32 %y, -2147483648
@@ -325,7 +322,7 @@ define i32 @test20(i32 %x) {
define i32 @xor_sign_bit(i32 %x) {
; CHECK-LABEL: @xor_sign_bit(
-; CHECK-NEXT: [[ADD:%.*]] = add i32 %x, -2147483606
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[X:%.*]], -2147483606
; CHECK-NEXT: ret i32 [[ADD]]
;
%xor = xor i32 %x, 2147483648
@@ -337,7 +334,7 @@ define i32 @xor_sign_bit(i32 %x) {
define i8 @add_nsw_signbit(i8 %x) {
; CHECK-LABEL: @add_nsw_signbit(
-; CHECK-NEXT: [[Y:%.*]] = or i8 %x, -128
+; CHECK-NEXT: [[Y:%.*]] = or i8 [[X:%.*]], -128
; CHECK-NEXT: ret i8 [[Y]]
;
%y = add nsw i8 %x, -128
@@ -348,7 +345,7 @@ define i8 @add_nsw_signbit(i8 %x) {
define i8 @add_nuw_signbit(i8 %x) {
; CHECK-LABEL: @add_nuw_signbit(
-; CHECK-NEXT: [[Y:%.*]] = or i8 %x, -128
+; CHECK-NEXT: [[Y:%.*]] = or i8 [[X:%.*]], -128
; CHECK-NEXT: ret i8 [[Y]]
;
%y = add nuw i8 %x, 128
@@ -357,7 +354,7 @@ define i8 @add_nuw_signbit(i8 %x) {
define i1 @test21(i32 %x) {
; CHECK-LABEL: @test21(
-; CHECK-NEXT: [[Y:%.*]] = icmp eq i32 %x, 119
+; CHECK-NEXT: [[Y:%.*]] = icmp eq i32 [[X:%.*]], 119
; CHECK-NEXT: ret i1 [[Y]]
;
%t = add i32 %x, 4
@@ -367,7 +364,7 @@ define i1 @test21(i32 %x) {
define <2 x i1> @test21vec(<2 x i32> %x) {
; CHECK-LABEL: @test21vec(
-; CHECK-NEXT: [[Y:%.*]] = icmp eq <2 x i32> %x, <i32 119, i32 119>
+; CHECK-NEXT: [[Y:%.*]] = icmp eq <2 x i32> [[X:%.*]], <i32 119, i32 119>
; CHECK-NEXT: ret <2 x i1> [[Y]]
;
%t = add <2 x i32> %x, <i32 4, i32 4>
@@ -377,9 +374,9 @@ define <2 x i1> @test21vec(<2 x i32> %x)
define i32 @test22(i32 %V) {
; CHECK-LABEL: @test22(
-; CHECK-NEXT: switch i32 %V, label %Default [
-; CHECK-NEXT: i32 10, label %Lab1
-; CHECK-NEXT: i32 20, label %Lab2
+; CHECK-NEXT: switch i32 [[V:%.*]], label [[DEFAULT:%.*]] [
+; CHECK-NEXT: i32 10, label [[LAB1:%.*]]
+; CHECK-NEXT: i32 20, label [[LAB2:%.*]]
; CHECK-NEXT: ]
; CHECK: Default:
; CHECK-NEXT: ret i32 123
@@ -407,11 +404,11 @@ Lab2: ; preds = %0
define i32 @test23(i1 %C, i32 %a) {
; CHECK-LABEL: @test23(
; CHECK-NEXT: entry:
-; CHECK-NEXT: br i1 %C, label %endif, label %else
+; CHECK-NEXT: br i1 [[C:%.*]], label [[ENDIF:%.*]], label [[ELSE:%.*]]
; CHECK: else:
-; CHECK-NEXT: br label %endif
+; CHECK-NEXT: br label [[ENDIF]]
; CHECK: endif:
-; CHECK-NEXT: [[B_0:%.*]] = phi i32 [ 1, %entry ], [ 2, %else ]
+; CHECK-NEXT: [[B_0:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ 2, [[ELSE]] ]
; CHECK-NEXT: ret i32 [[B_0]]
;
entry:
@@ -428,7 +425,7 @@ endif: ; preds = %else, %entry
define i32 @test24(i32 %A) {
; CHECK-LABEL: @test24(
-; CHECK-NEXT: [[B:%.*]] = shl i32 %A, 1
+; CHECK-NEXT: [[B:%.*]] = shl i32 [[A:%.*]], 1
; CHECK-NEXT: ret i32 [[B]]
;
%B = add i32 %A, 1
@@ -439,7 +436,7 @@ define i32 @test24(i32 %A) {
define i64 @test25(i64 %Y) {
; CHECK-LABEL: @test25(
-; CHECK-NEXT: [[TMP_8:%.*]] = shl i64 %Y, 3
+; CHECK-NEXT: [[TMP_8:%.*]] = shl i64 [[Y:%.*]], 3
; CHECK-NEXT: ret i64 [[TMP_8]]
;
%tmp.4 = shl i64 %Y, 2
@@ -450,21 +447,21 @@ define i64 @test25(i64 %Y) {
define i32 @test26(i32 %A, i32 %B) {
; CHECK-LABEL: @test26(
-; CHECK-NEXT: ret i32 %A
+; CHECK-NEXT: ret i32 [[A:%.*]]
;
%C = add i32 %A, %B
%D = sub i32 %C, %B
ret i32 %D
}
+; Fold add through select.
define i32 @test27(i1 %C, i32 %X, i32 %Y) {
; CHECK-LABEL: @test27(
-; CHECK-NEXT: [[C_UPGRD_1_V:%.*]] = select i1 %C, i32 %X, i32 123
+; CHECK-NEXT: [[C_UPGRD_1_V:%.*]] = select i1 [[C:%.*]], i32 [[X:%.*]], i32 123
; CHECK-NEXT: ret i32 [[C_UPGRD_1_V]]
;
%A = add i32 %X, %Y
%B = add i32 %Y, 123
- ;; Fold add through select.
%C.upgrd.1 = select i1 %C, i32 %A, i32 %B
%D = sub i32 %C.upgrd.1, %Y
ret i32 %D
@@ -472,7 +469,7 @@ define i32 @test27(i1 %C, i32 %X, i32 %Y
define i32 @test28(i32 %X) {
; CHECK-LABEL: @test28(
-; CHECK-NEXT: [[Z:%.*]] = sub i32 -1192, %X
+; CHECK-NEXT: [[Z:%.*]] = sub i32 -1192, [[X:%.*]]
; CHECK-NEXT: ret i32 [[Z]]
;
%Y = add i32 %X, 1234
@@ -480,15 +477,16 @@ define i32 @test28(i32 %X) {
ret i32 %Z
}
-define i32 @test29(i32 %X, i32 %x) {
+define i32 @test29(i32 %x, i32 %y) {
; CHECK-LABEL: @test29(
-; CHECK-NEXT: [[TMP_2:%.*]] = sub i32 %X, %x
-; CHECK-NEXT: [[TMP_7:%.*]] = and i32 %X, 63
+; CHECK-NEXT: [[TMP_2:%.*]] = sub i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[TMP_6:%.*]] = add i32 [[TMP_2]], [[X]]
+; CHECK-NEXT: [[TMP_7:%.*]] = and i32 [[TMP_6]], 63
; CHECK-NEXT: [[TMP_9:%.*]] = and i32 [[TMP_2]], -64
; CHECK-NEXT: [[TMP_10:%.*]] = or i32 [[TMP_7]], [[TMP_9]]
; CHECK-NEXT: ret i32 [[TMP_10]]
;
- %tmp.2 = sub i32 %X, %x
+ %tmp.2 = sub i32 %x, %y
%tmp.2.mask = and i32 %tmp.2, 63
%tmp.6 = add i32 %tmp.2.mask, %x
%tmp.7 = and i32 %tmp.6, 63
@@ -497,19 +495,19 @@ define i32 @test29(i32 %X, i32 %x) {
ret i32 %tmp.10
}
+; Add of sign bit -> xor of sign bit.
define i64 @test30(i64 %x) {
; CHECK-LABEL: @test30(
-; CHECK-NEXT: ret i64 %x
+; CHECK-NEXT: ret i64 [[X:%.*]]
;
%tmp.2 = xor i64 %x, -9223372036854775808
- ;; Add of sign bit -> xor of sign bit.
%tmp.4 = add i64 %tmp.2, -9223372036854775808
ret i64 %tmp.4
}
define i32 @test31(i32 %A) {
; CHECK-LABEL: @test31(
-; CHECK-NEXT: [[TMP1:%.*]] = mul i32 %A, 5
+; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[A:%.*]], 5
; CHECK-NEXT: ret i32 [[TMP1]]
;
%B = add i32 %A, 4
@@ -520,7 +518,7 @@ define i32 @test31(i32 %A) {
define i32 @test32(i32 %A) {
; CHECK-LABEL: @test32(
-; CHECK-NEXT: [[B:%.*]] = shl i32 %A, 2
+; CHECK-NEXT: [[B:%.*]] = shl i32 [[A:%.*]], 2
; CHECK-NEXT: ret i32 [[B]]
;
%B = add i32 %A, 4
@@ -531,7 +529,7 @@ define i32 @test32(i32 %A) {
define i8 @test33(i8 %A) {
; CHECK-LABEL: @test33(
-; CHECK-NEXT: [[C:%.*]] = or i8 %A, 1
+; CHECK-NEXT: [[C:%.*]] = or i8 [[A:%.*]], 1
; CHECK-NEXT: ret i8 [[C]]
;
%B = and i8 %A, -2
@@ -541,7 +539,7 @@ define i8 @test33(i8 %A) {
define i8 @test34(i8 %A) {
; CHECK-LABEL: @test34(
-; CHECK-NEXT: [[C:%.*]] = and i8 %A, 12
+; CHECK-NEXT: [[C:%.*]] = and i8 [[A:%.*]], 12
; CHECK-NEXT: ret i8 [[C]]
;
%B = add i8 %A, 64
@@ -549,6 +547,42 @@ define i8 @test34(i8 %A) {
ret i8 %C
}
+; If all bits affected by the add are included
+; in the mask, do the add before the mask op.
+
+define i8 @masked_add(i8 %x) {
+; CHECK-LABEL: @masked_add(
+; CHECK-NEXT: [[AND1:%.*]] = add i8 [[X:%.*]], 96
+; CHECK-NEXT: [[R:%.*]] = and i8 [[AND1]], -16
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %and = and i8 %x, 240 ; 0xf0
+ %r = add i8 %and, 96 ; 0x60
+ ret i8 %r
+}
+
+define <2 x i8> @masked_add_splat(<2 x i8> %x) {
+; CHECK-LABEL: @masked_add_splat(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 -64, i8 -64>
+; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[AND]], <i8 64, i8 64>
+; CHECK-NEXT: ret <2 x i8> [[R]]
+;
+ %and = and <2 x i8> %x, <i8 192, i8 192> ; 0xc0
+ %r = add <2 x i8> %and, <i8 64, i8 64> ; 0x40
+ ret <2 x i8> %r
+}
+
+define i8 @not_masked_add(i8 %x) {
+; CHECK-LABEL: @not_masked_add(
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 112
+; CHECK-NEXT: [[R:%.*]] = add nuw i8 [[AND]], 96
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %and = and i8 %x, 112 ; 0x70
+ %r = add i8 %and, 96 ; 0x60
+ ret i8 %r
+}
+
define i32 @test35(i32 %a) {
; CHECK-LABEL: @test35(
; CHECK-NEXT: ret i32 -1
@@ -571,7 +605,7 @@ define i32 @test36(i32 %a) {
define i1 @test37(i32 %a, i32 %b) {
; CHECK-LABEL: @test37(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %b, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[B:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add i32 %a, %b
@@ -581,7 +615,7 @@ define i1 @test37(i32 %a, i32 %b) {
define i1 @test38(i32 %a, i32 %b) {
; CHECK-LABEL: @test38(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add i32 %a, %b
@@ -591,7 +625,7 @@ define i1 @test38(i32 %a, i32 %b) {
define i1 @test39(i32 %a, i32 %b) {
; CHECK-LABEL: @test39(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %b, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[B:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add i32 %b, %a
@@ -601,7 +635,7 @@ define i1 @test39(i32 %a, i32 %b) {
define i1 @test40(i32 %a, i32 %b) {
; CHECK-LABEL: @test40(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%add = add i32 %b, %a
@@ -613,9 +647,9 @@ define i1 @test40(i32 %a, i32 %b) {
define i64 @test41(i32 %a) {
; CHECK-LABEL: @test41(
-; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 %a, 15
-; CHECK-NEXT: [[EXT:%.*]] = zext i32 [[ADD]] to i64
-; CHECK-NEXT: ret i64 [[EXT]]
+; CHECK-NEXT: [[TMP1:%.*]] = add nuw i32 [[A:%.*]], 15
+; CHECK-NEXT: [[SUB:%.*]] = zext i32 [[TMP1]] to i64
+; CHECK-NEXT: ret i64 [[SUB]]
;
%add = add nuw i32 %a, 16
%zext = zext i32 %add to i64
@@ -627,7 +661,7 @@ define i64 @test41(i32 %a) {
define <2 x i64> @test41vec(<2 x i32> %a) {
; CHECK-LABEL: @test41vec(
-; CHECK-NEXT: [[TMP1:%.*]] = add nuw <2 x i32> %a, <i32 15, i32 15>
+; CHECK-NEXT: [[TMP1:%.*]] = add nuw <2 x i32> [[A:%.*]], <i32 15, i32 15>
; CHECK-NEXT: [[SUB:%.*]] = zext <2 x i32> [[TMP1]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[SUB]]
;
@@ -639,7 +673,7 @@ define <2 x i64> @test41vec(<2 x i32> %a
define <2 x i64> @test41vec_and_multiuse(<2 x i32> %a) {
; CHECK-LABEL: @test41vec_and_multiuse(
-; CHECK-NEXT: [[ADD:%.*]] = add nuw <2 x i32> %a, <i32 16, i32 16>
+; CHECK-NEXT: [[ADD:%.*]] = add nuw <2 x i32> [[A:%.*]], <i32 16, i32 16>
; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i32> [[ADD]] to <2 x i64>
; CHECK-NEXT: [[SUB:%.*]] = add nsw <2 x i64> [[ZEXT]], <i64 -1, i64 -1>
; CHECK-NEXT: [[EXTRAUSE:%.*]] = add nsw <2 x i64> [[SUB]], [[ZEXT]]
More information about the llvm-commits
mailing list