[llvm] r331213 - [MIR] Reset unique MBB numbering in MachineFunction::reset()
Roman Tereshin via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 30 11:58:57 PDT 2018
Author: rtereshin
Date: Mon Apr 30 11:58:57 2018
New Revision: 331213
URL: http://llvm.org/viewvc/llvm-project?rev=331213&view=rev
Log:
[MIR] Reset unique MBB numbering in MachineFunction::reset()
No need to waste space nor number MBBs differently if MF gets recreated.
Reviewers: qcolombet, stoklund, t.p.northover, bogner, javed.absar
Reviewed By: qcolombet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46078
Modified:
llvm/trunk/lib/CodeGen/MachineFunction.cpp
llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-verify-failedISel-property.mir
Modified: llvm/trunk/lib/CodeGen/MachineFunction.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineFunction.cpp?rev=331213&r1=331212&r2=331213&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineFunction.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineFunction.cpp Mon Apr 30 11:58:57 2018
@@ -196,6 +196,7 @@ void MachineFunction::clear() {
// Do call MachineBasicBlock destructors, it contains std::vectors.
for (iterator I = begin(), E = end(); I != E; I = BasicBlocks.erase(I))
I->Insts.clearAndLeakNodesUnsafely();
+ MBBNumbering.clear();
InstructionRecycler.clear(Allocator);
OperandRecycler.clear(Allocator);
Modified: llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-verify-failedISel-property.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-verify-failedISel-property.mir?rev=331213&r1=331212&r2=331213&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-verify-failedISel-property.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AArch64/print-parse-verify-failedISel-property.mir Mon Apr 30 11:58:57 2018
@@ -14,6 +14,7 @@
# 5) It's possible to start llc mid-GlobalISel pipeline from a MIR file with
# the FailedISel property set to true and watch it properly fallback to
# FastISel / SelectionDAG ISel.
+# 6) Resetting a MachineFunction resets unique MachineBasicBlock IDs as well.
--- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--"
@@ -40,17 +41,21 @@ regBankSelected: true
failedISel: true
tracksRegLiveness: true
body: |
- bb.1.entry:
+ bb.0.entry:
liveins: $w0, $w1
; CHECK: liveins: $w0, $w1
+ ;
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY1]], [[COPY]]
; CHECK: $w0 = COPY [[ADD]](s32)
; CHECK: RET_ReallyLR implicit $w0
;
- ; FALLBACK: liveins: $w0, $w1
+ ; FALLBACK: body: |
+ ; FALLBACK-NEXT: bb.0.entry:
+ ; FALLBACK-NEXT: liveins: $w0, $w1
+ ;
; FALLBACK: [[COPY:%[0-9]+]]:gpr32 = COPY $w1
; FALLBACK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0
; FALLBACK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]
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