[PATCH] D46266: [X86] Introduce X86SchedWriteWidths schedule wrapper for different vector widths.

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, courbet, gchatelet, andreadb, spatel.

We need to split most of the scheduler classes by vector width to remove more of the InstRW overrides, this patch should make this easier/tidier by allowing us to pass the X86SchedWriteWidths wrapper to multi-width multiclasses and then split as required.

At the moment I've included fields for Scl (scalar - I wasn't sure if I should split this into SS/SD?), MMX (MMX integer), XMM, YMM and ZMM widths. These fields mostly share the same classes but it should give us the flexibility that we may need in the future.

This patch has replaced a set of example SSE/AVX512 instruction cases but isn't exhaustive as it gets very noisy.


Repository:
  rL LLVM

https://reviews.llvm.org/D46266

Files:
  lib/Target/X86/X86InstrAVX512.td
  lib/Target/X86/X86InstrSSE.td
  lib/Target/X86/X86Schedule.td

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