[PATCH] D45683: [mips][msa] Pattern match the splat.d instruction

[Simon Dardis via Phabricator via llvm-commits]

sdardis accepted this revision.
sdardis added a comment.
This revision is now accepted and ready to land.

LGTM. Some minor nits inlined.



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Comment at: lib/Target/Mips/MipsMSAInstrInfo.td:195-202
+
+def vsplati64_splat_d : PatFrag<(ops node:$e0),
+                        (v2i64 (bitconvert
+                                 (v4i32 (and
+                                   (v4i32 (build_vector node:$e0, node:$e0,
+                                                       node:$e0, node:$e0)),
+                                    vsplati64_imm_eq_1))))>;
----------------
Nit on the formatting here:


```
def vsplati64_splat_d : PatFrag<(ops node:$e0),
                                (v2i64 (bitconvert
                                         (v4i32 (and
                                           (v4i32 (build_vector node:$e0,
                                                                node:$e0,
                                                                node:$e0,
                                                                node:$e0)),
                                           vsplati64_imm_eq_1))))>;
```


================
Comment at: lib/Target/Mips/MipsSEISelLowering.cpp:1346
   if (ResVecTy == MVT::v2i64) {
-    LaneB = DAG.getConstant(0, DL, MVT::i32);
+    // In case of index passed as an immediate value, set the upper lane to 0
+    // so that the splati.d instruction can be matched.
----------------
In case of the index being passed as an immediate value....


================
Comment at: test/CodeGen/Mips/msa/3r_splat.ll:107
+; MIPS32-NOT: vshf.d
+; MIPS32: .size llvm_mips_splat_d_arg_test
 
----------------
This line can be dropped.


================
Comment at: test/CodeGen/Mips/msa/3r_splat.ll:123
+; MIPS32-NOT: vshf.d
+; MIPS32: .size llvm_mips_splat_d_imm_test
----------------
This line can be dropped.


https://reviews.llvm.org/D45683