[llvm] r331147 - [X86] Remove unnecessary BT InstRW overrides.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 29 11:18:51 PDT 2018
Author: rksimon
Date: Sun Apr 29 11:18:51 2018
New Revision: 331147
URL: http://llvm.org/viewvc/llvm-project?rev=331147&view=rev
Log:
[X86] Remove unnecessary BT InstRW overrides.
Modified:
llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
Modified: llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td?rev=331147&r1=331146&r2=331147&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td Sun Apr 29 11:18:51 2018
@@ -554,10 +554,7 @@ def ZnWriteALULat2Ld : SchedWriteRes<[Zn
}
// BT.
-// r,r/i.
-def : InstRW<[WriteShift], (instregex "BT(16|32|64)r(r|i8)")>;
-
-def : InstRW<[WriteShiftLd], (instregex "BT(16|32|64)mr")>;
+// m,i.
def : InstRW<[WriteShiftLd], (instregex "BT(16|32|64)mi8")>;
// BTR BTS BTC.
@@ -568,7 +565,6 @@ def ZnWriteBTRSC : SchedWriteRes<[ZnALU]
}
def : InstRW<[ZnWriteBTRSC], (instregex "BT(R|S|C)(16|32|64)r(r|i8)")>;
-
// m,r,i.
def ZnWriteBTRSCm : SchedWriteRes<[ZnAGU, ZnALU]> {
let Latency = 6;
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