[llvm] r331027 - [ARM] Enable misched for R52.

[David Green via llvm-commits]

Author: dmgreen
Date: Fri Apr 27 04:29:49 2018
New Revision: 331027

URL: http://llvm.org/viewvc/llvm-project?rev=331027&view=rev
Log:
[ARM] Enable misched for R52.

Back when the R52 schedule was added in rL286949, there was no way
to enable machine schedules in ARM for specific cores. Since then a
target feature has been added. This enables the feature for R52,
removing the need to manually specify compiler flags.


Modified:
    llvm/trunk/lib/Target/ARM/ARM.td
    llvm/trunk/test/CodeGen/ARM/cortexr52-misched-basic.ll

Modified: llvm/trunk/lib/Target/ARM/ARM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.td?rev=331027&r1=331026&r2=331027&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.td (original)
+++ llvm/trunk/lib/Target/ARM/ARM.td Fri Apr 27 04:29:49 2018
@@ -999,6 +999,7 @@ def : ProcNoItin<"kryo",
                                                          FeatureCRC]>;
 
 def : ProcessorModel<"cortex-r52", CortexR52Model,      [ARMv8r, ProcR52,
+                                                         FeatureUseMISched,
                                                          FeatureFPAO]>;
 
 //===----------------------------------------------------------------------===//

Modified: llvm/trunk/test/CodeGen/ARM/cortexr52-misched-basic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/cortexr52-misched-basic.ll?rev=331027&r1=331026&r2=331027&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/cortexr52-misched-basic.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/cortexr52-misched-basic.ll Fri Apr 27 04:29:49 2018
@@ -1,5 +1,5 @@
 ; REQUIRES: asserts
-; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED
+; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=R52_SCHED
 ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic    -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
 ;
 ; Check the latency for instructions for both generic and cortex-r52.