[PATCH] D46118: [RISCV] [WIP] AsmParser support for the li pseudo instruction

[Mario Werner via Phabricator via llvm-commits]

niosHD created this revision.
niosHD added a reviewer: asb.
Herald added subscribers: llvm-commits, edward-jones, zzheng, shiva0217, kito-cheng, sabuasal, apazos, jordy.potman.lists, simoncook, johnrusso, rbar, arichardson, sdardis.

The implementation follows the MIPS backend and expands the pseudo instruction directly during asm parsing. As the result, only real MC instructions are emitted to the MCStreamer. The actual expansion to real instructions is similar to the expansion performed by the GNU Assembler.

This patch supersedes https://reviews.llvm.org/D41949.

Note that I marked this patch as WIP because I am currently traveling but plan to add compression tests to this patch in an update next week. Comments on the current state are appreciated though.


Repository:
  rL LLVM

https://reviews.llvm.org/D46118

Files:
  lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  lib/Target/RISCV/RISCVInstrFormats.td
  lib/Target/RISCV/RISCVInstrInfo.td
  test/MC/RISCV/rv32i-aliases-invalid.s
  test/MC/RISCV/rv32i-aliases-valid.s
  test/MC/RISCV/rv64i-aliases-invalid.s
  test/MC/RISCV/rv64i-aliases-valid.s
  test/MC/RISCV/rvi-aliases-valid.s

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