[PATCH] D44785: Lowering x86 adds/addus/subs/subus intrinsics (llvm part)
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 25 10:03:52 PDT 2018
craig.topper added a comment.
Thomasz, can you open a new review for the changes?
================
Comment at: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp:36074
+ return SDValue();
+
+ // The pattern is detected, emit ADDS/ADDUS/SUBS/SUBUS instruction.
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Don't we need to make sure the input type to extends is the same as VT?
Repository:
rL LLVM
https://reviews.llvm.org/D44785
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