[llvm] r330781 - [DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 24 15:35:27 PDT 2018
Author: ctopper
Date: Tue Apr 24 15:35:27 2018
New Revision: 330781
URL: http://llvm.org/viewvc/llvm-project?rev=330781&view=rev
Log:
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
We were previously prefering ZEXTLOAD over EXTLOAD if it is legal. This triggers during X86's promotion of i16->i32. Not sure about other targets.
Using ZEXTLOAD can prevent folding it to SEXTLOAD later if we were to promote a sign extended operand like we would need for SRA. However, X86 doesn't currently promote i16 SRA. I was looking into doing that which is how I found this issue.
This is also blocking our ability to fold 4 byte aligned EXTLOADs with "loadi32". This is what caused most of the test changes here.
Differential Revision: https://reviews.llvm.org/D45585#inline-402825
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/trunk/test/CodeGen/X86/3addr-16bit.ll
llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll
llvm/trunk/test/CodeGen/X86/fixup-bw-copy.ll
llvm/trunk/test/CodeGen/X86/iabs.ll
llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll
llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll
llvm/trunk/test/CodeGen/X86/popcnt.ll
llvm/trunk/test/CodeGen/X86/pr32345.ll
llvm/trunk/test/CodeGen/X86/pr32420.ll
llvm/trunk/test/CodeGen/X86/pr34137.ll
llvm/trunk/test/CodeGen/X86/promote-i16.ll
llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Apr 24 15:35:27 2018
@@ -1089,10 +1089,8 @@ SDValue DAGCombiner::PromoteOperand(SDVa
if (ISD::isUNINDEXEDLoad(Op.getNode())) {
LoadSDNode *LD = cast<LoadSDNode>(Op);
EVT MemVT = LD->getMemoryVT();
- ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD)
- ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, PVT, MemVT) ? ISD::ZEXTLOAD
- : ISD::EXTLOAD)
- : LD->getExtensionType();
+ ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD
+ : LD->getExtensionType();
Replace = true;
return DAG.getExtLoad(ExtType, DL, PVT,
LD->getChain(), LD->getBasePtr(),
@@ -1327,10 +1325,8 @@ bool DAGCombiner::PromoteLoad(SDValue Op
SDNode *N = Op.getNode();
LoadSDNode *LD = cast<LoadSDNode>(N);
EVT MemVT = LD->getMemoryVT();
- ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD)
- ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, PVT, MemVT) ? ISD::ZEXTLOAD
- : ISD::EXTLOAD)
- : LD->getExtensionType();
+ ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) ? ISD::EXTLOAD
+ : LD->getExtensionType();
SDValue NewLD = DAG.getExtLoad(ExtType, DL, PVT,
LD->getChain(), LD->getBasePtr(),
MemVT, LD->getMemOperand());
Modified: llvm/trunk/test/CodeGen/X86/3addr-16bit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/3addr-16bit.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/3addr-16bit.ll (original)
+++ llvm/trunk/test/CodeGen/X86/3addr-16bit.ll Tue Apr 24 15:35:27 2018
@@ -29,7 +29,7 @@ define zeroext i16 @test1(i16 zeroext %c
; X32: ## %bb.0: ## %entry
; X32-NEXT: pushl %esi
; X32-NEXT: subl $8, %esp
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: incl %eax
; X32-NEXT: cmpw {{[0-9]+}}(%esp), %cx
@@ -82,7 +82,7 @@ define zeroext i16 @test2(i16 zeroext %c
; X32: ## %bb.0: ## %entry
; X32-NEXT: pushl %esi
; X32-NEXT: subl $8, %esp
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: decl %eax
; X32-NEXT: cmpw {{[0-9]+}}(%esp), %cx
@@ -137,7 +137,7 @@ define zeroext i16 @test3(i16 zeroext %c
; X32: ## %bb.0: ## %entry
; X32-NEXT: pushl %esi
; X32-NEXT: subl $8, %esp
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: addl $2, %eax
; X32-NEXT: cmpw {{[0-9]+}}(%esp), %cx
@@ -190,8 +190,8 @@ define zeroext i16 @test4(i16 zeroext %c
; X32: ## %bb.0: ## %entry
; X32-NEXT: pushl %esi
; X32-NEXT: subl $8, %esp
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movl %edx, %eax
; X32-NEXT: addl %ecx, %eax
; X32-NEXT: cmpw %cx, %dx
Modified: llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll Tue Apr 24 15:35:27 2018
@@ -15,7 +15,7 @@ define i16 @mask16(i16 %x) {
;
; X86-LABEL: mask16:
; X86: ## %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: notl %eax
; X86-NEXT: ## kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
@@ -157,8 +157,8 @@ define i16 @mand16(i16 %x, i16 %y) {
;
; X86-LABEL: mand16:
; X86: ## %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %edx
; X86-NEXT: andl %ecx, %edx
; X86-NEXT: xorl %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/fixup-bw-copy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fixup-bw-copy.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fixup-bw-copy.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fixup-bw-copy.ll Tue Apr 24 15:35:27 2018
@@ -59,7 +59,7 @@ define i8 @test_movb_hreg(i16 %a0) {
;
; X32-LABEL: test_movb_hreg:
; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: addb %al, %ah
; X32-NEXT: movb %ah, %al
; X32-NEXT: retl
Modified: llvm/trunk/test/CodeGen/X86/iabs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/iabs.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/iabs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/iabs.ll Tue Apr 24 15:35:27 2018
@@ -36,7 +36,7 @@ define i8 @test_i8(i8 %a) nounwind {
define i16 @test_i16(i16 %a) nounwind {
; X86-NO-CMOV-LABEL: test_i16:
; X86-NO-CMOV: # %bb.0:
-; X86-NO-CMOV-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NO-CMOV-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NO-CMOV-NEXT: movl %eax, %ecx
; X86-NO-CMOV-NEXT: sarw $15, %cx
; X86-NO-CMOV-NEXT: addl %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ins_subreg_coalesce-1.ll Tue Apr 24 15:35:27 2018
@@ -1,13 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
define fastcc i32 @t() nounwind {
-entry:
; CHECK-LABEL: t:
-; CHECK: movzwl 0, %eax
-; CHECK: orl $2, %eax
-; CHECK: movw %ax, 0
-; CHECK: shrl $3, %eax
-; CHECK: andl $1, %eax
+; CHECK: # %bb.0: # %walkExprTree.exit
+; CHECK-NEXT: movl 0, %eax
+; CHECK-NEXT: orl $2, %eax
+; CHECK-NEXT: movw %ax, 0
+; CHECK-NEXT: shrl $3, %eax
+; CHECK-NEXT: andl $1, %eax
+; CHECK-NEXT: retl
+entry:
br i1 false, label %UnifiedReturnBlock, label %bb4
bb4: ; preds = %entry
br i1 false, label %bb17, label %bb22
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll Tue Apr 24 15:35:27 2018
@@ -19,7 +19,7 @@ define i16 @test_mul_by_1(i16 %x) {
define i16 @test_mul_by_2(i16 %x) {
; X86-LABEL: test_mul_by_2:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
@@ -37,8 +37,7 @@ define i16 @test_mul_by_2(i16 %x) {
define i16 @test_mul_by_3(i16 %x) {
; X86-LABEL: test_mul_by_3:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: leal (%eax,%eax,2), %eax
+; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
;
@@ -55,7 +54,7 @@ define i16 @test_mul_by_3(i16 %x) {
define i16 @test_mul_by_4(i16 %x) {
; X86-LABEL: test_mul_by_4:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
@@ -73,8 +72,7 @@ define i16 @test_mul_by_4(i16 %x) {
define i16 @test_mul_by_5(i16 %x) {
; X86-LABEL: test_mul_by_5:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: leal (%eax,%eax,4), %eax
+; X86-NEXT: imull $5, {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
;
@@ -91,7 +89,7 @@ define i16 @test_mul_by_5(i16 %x) {
define i16 @test_mul_by_6(i16 %x) {
; X86-LABEL: test_mul_by_6:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -111,7 +109,7 @@ define i16 @test_mul_by_6(i16 %x) {
define i16 @test_mul_by_7(i16 %x) {
; X86-LABEL: test_mul_by_7:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (,%ecx,8), %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -131,7 +129,7 @@ define i16 @test_mul_by_7(i16 %x) {
define i16 @test_mul_by_8(i16 %x) {
; X86-LABEL: test_mul_by_8:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
@@ -149,8 +147,7 @@ define i16 @test_mul_by_8(i16 %x) {
define i16 @test_mul_by_9(i16 %x) {
; X86-LABEL: test_mul_by_9:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: leal (%eax,%eax,8), %eax
+; X86-NEXT: imull $9, {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
;
@@ -167,7 +164,7 @@ define i16 @test_mul_by_9(i16 %x) {
define i16 @test_mul_by_10(i16 %x) {
; X86-LABEL: test_mul_by_10:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -187,7 +184,7 @@ define i16 @test_mul_by_10(i16 %x) {
define i16 @test_mul_by_11(i16 %x) {
; X86-LABEL: test_mul_by_11:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -207,7 +204,7 @@ define i16 @test_mul_by_11(i16 %x) {
define i16 @test_mul_by_12(i16 %x) {
; X86-LABEL: test_mul_by_12:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -227,7 +224,7 @@ define i16 @test_mul_by_12(i16 %x) {
define i16 @test_mul_by_13(i16 %x) {
; X86-LABEL: test_mul_by_13:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -247,7 +244,7 @@ define i16 @test_mul_by_13(i16 %x) {
define i16 @test_mul_by_14(i16 %x) {
; X86-LABEL: test_mul_by_14:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
; X86-NEXT: addl %ecx, %eax
@@ -269,7 +266,7 @@ define i16 @test_mul_by_14(i16 %x) {
define i16 @test_mul_by_15(i16 %x) {
; X86-LABEL: test_mul_by_15:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -289,7 +286,7 @@ define i16 @test_mul_by_15(i16 %x) {
define i16 @test_mul_by_16(i16 %x) {
; X86-LABEL: test_mul_by_16:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $4, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
@@ -306,7 +303,7 @@ define i16 @test_mul_by_16(i16 %x) {
define i16 @test_mul_by_17(i16 %x) {
; X86-LABEL: test_mul_by_17:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $4, %eax
; X86-NEXT: addl %ecx, %eax
@@ -328,7 +325,7 @@ define i16 @test_mul_by_17(i16 %x) {
define i16 @test_mul_by_18(i16 %x) {
; X86-LABEL: test_mul_by_18:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -348,7 +345,7 @@ define i16 @test_mul_by_18(i16 %x) {
define i16 @test_mul_by_19(i16 %x) {
; X86-LABEL: test_mul_by_19:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: subl %ecx, %eax
@@ -370,7 +367,7 @@ define i16 @test_mul_by_19(i16 %x) {
define i16 @test_mul_by_20(i16 %x) {
; X86-LABEL: test_mul_by_20:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -390,7 +387,7 @@ define i16 @test_mul_by_20(i16 %x) {
define i16 @test_mul_by_21(i16 %x) {
; X86-LABEL: test_mul_by_21:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -410,7 +407,7 @@ define i16 @test_mul_by_21(i16 %x) {
define i16 @test_mul_by_22(i16 %x) {
; X86-LABEL: test_mul_by_22:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
; X86-NEXT: addl %ecx, %eax
@@ -432,7 +429,7 @@ define i16 @test_mul_by_22(i16 %x) {
define i16 @test_mul_by_23(i16 %x) {
; X86-LABEL: test_mul_by_23:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: subl %ecx, %eax
@@ -454,7 +451,7 @@ define i16 @test_mul_by_23(i16 %x) {
define i16 @test_mul_by_24(i16 %x) {
; X86-LABEL: test_mul_by_24:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -474,7 +471,7 @@ define i16 @test_mul_by_24(i16 %x) {
define i16 @test_mul_by_25(i16 %x) {
; X86-LABEL: test_mul_by_25:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -494,7 +491,7 @@ define i16 @test_mul_by_25(i16 %x) {
define i16 @test_mul_by_26(i16 %x) {
; X86-LABEL: test_mul_by_26:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: subl %ecx, %eax
@@ -516,7 +513,7 @@ define i16 @test_mul_by_26(i16 %x) {
define i16 @test_mul_by_27(i16 %x) {
; X86-LABEL: test_mul_by_27:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
@@ -536,7 +533,7 @@ define i16 @test_mul_by_27(i16 %x) {
define i16 @test_mul_by_28(i16 %x) {
; X86-LABEL: test_mul_by_28:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: addl %ecx, %eax
@@ -558,7 +555,7 @@ define i16 @test_mul_by_28(i16 %x) {
define i16 @test_mul_by_29(i16 %x) {
; X86-LABEL: test_mul_by_29:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: addl %ecx, %eax
@@ -582,7 +579,7 @@ define i16 @test_mul_by_29(i16 %x) {
define i16 @test_mul_by_30(i16 %x) {
; X86-LABEL: test_mul_by_30:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $5, %eax
; X86-NEXT: subl %ecx, %eax
@@ -605,7 +602,7 @@ define i16 @test_mul_by_30(i16 %x) {
define i16 @test_mul_by_31(i16 %x) {
; X86-LABEL: test_mul_by_31:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $5, %eax
; X86-NEXT: subl %ecx, %eax
@@ -626,7 +623,7 @@ define i16 @test_mul_by_31(i16 %x) {
define i16 @test_mul_by_32(i16 %x) {
; X86-LABEL: test_mul_by_32:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $5, %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
@@ -644,7 +641,7 @@ define i16 @test_mul_by_32(i16 %x) {
define i16 @test_mul_spec(i16 %x) nounwind {
; X86-LABEL: test_mul_spec:
; X86: # %bb.0:
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal 42(%eax,%eax,8), %ecx
; X86-NEXT: leal 2(%eax,%eax,4), %eax
; X86-NEXT: imull %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/popcnt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/popcnt.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/popcnt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/popcnt.ll Tue Apr 24 15:35:27 2018
@@ -60,7 +60,7 @@ define i8 @cnt8(i8 %x) nounwind readnone
define i16 @cnt16(i16 %x) nounwind readnone {
; X32-LABEL: cnt16:
; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: shrl %ecx
; X32-NEXT: andl $21845, %ecx # imm = 0x5555
Modified: llvm/trunk/test/CodeGen/X86/pr32345.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32345.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32345.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32345.ll Tue Apr 24 15:35:27 2018
@@ -72,19 +72,19 @@ define void @foo() {
; 6860-NEXT: addl $-16610, %ecx # imm = 0xBF1E
; 6860-NEXT: movb %cl, %bl
; 6860-NEXT: xorl %ecx, %ecx
-; 6860-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
+; 6860-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; 6860-NEXT: movb %bl, %cl
-; 6860-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
+; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; 6860-NEXT: shrdl %cl, %edi, %esi
; 6860-NEXT: testb $32, %bl
-; 6860-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
-; 6860-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
+; 6860-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; 6860-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; 6860-NEXT: jne .LBB0_2
; 6860-NEXT: # %bb.1: # %bb
-; 6860-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
-; 6860-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
+; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; 6860-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; 6860-NEXT: .LBB0_2: # %bb
-; 6860-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
+; 6860-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; 6860-NEXT: movb %al, %cl
; 6860-NEXT: # implicit-def: $eax
; 6860-NEXT: movb %cl, (%eax)
@@ -98,11 +98,12 @@ define void @foo() {
;
; X64-LABEL: foo:
; X64: # %bb.0: # %bb
-; X64-NEXT: movzwl {{.*}}(%rip), %ecx
; X64-NEXT: movzwl {{.*}}(%rip), %eax
-; X64-NEXT: xorw %cx, %ax
-; X64-NEXT: xorl %ecx, %eax
-; X64-NEXT: movzwl %ax, %eax
+; X64-NEXT: movzwl {{.*}}(%rip), %ecx
+; X64-NEXT: movl %ecx, %edx
+; X64-NEXT: xorl %edx, %edx
+; X64-NEXT: xorl %eax, %edx
+; X64-NEXT: movzwl %dx, %eax
; X64-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
; X64-NEXT: addl $-16610, %ecx # imm = 0xBF1E
; X64-NEXT: # kill: def $cl killed $cl killed $ecx
@@ -119,11 +120,12 @@ define void @foo() {
; 686-NEXT: .cfi_def_cfa_register %ebp
; 686-NEXT: andl $-8, %esp
; 686-NEXT: subl $8, %esp
-; 686-NEXT: movzwl var_27, %ecx
; 686-NEXT: movzwl var_22, %eax
-; 686-NEXT: xorw %cx, %ax
-; 686-NEXT: xorl %ecx, %eax
-; 686-NEXT: movzwl %ax, %eax
+; 686-NEXT: movzwl var_27, %ecx
+; 686-NEXT: movl %ecx, %edx
+; 686-NEXT: xorl %ecx, %edx
+; 686-NEXT: xorl %eax, %edx
+; 686-NEXT: movzwl %dx, %eax
; 686-NEXT: movl %eax, (%esp)
; 686-NEXT: movl $0, {{[0-9]+}}(%esp)
; 686-NEXT: addl $-16610, %ecx # imm = 0xBF1E
Modified: llvm/trunk/test/CodeGen/X86/pr32420.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32420.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32420.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32420.ll Tue Apr 24 15:35:27 2018
@@ -10,16 +10,18 @@ target triple = "x86_64-apple-macosx10.1
define i32 @PR32420() {
; CHECK-LABEL: PR32420:
; CHECK: ## %bb.0:
-; CHECK-NEXT: movq _a@{{.*}}(%rip), %rax
-; CHECK-NEXT: movzwl (%rax), %eax
-; CHECK-NEXT: movl %eax, %ecx
+; CHECK-NEXT: movq _a@{{.*}}(%rip), %rcx
+; CHECK-NEXT: movzwl (%rcx), %eax
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: shll $12, %edx
+; CHECK-NEXT: sarw $12, %dx
+; CHECK-NEXT: movq _b@{{.*}}(%rip), %rsi
+; CHECK-NEXT: orw (%rsi), %dx
+; CHECK-NEXT: movl (%rcx), %ecx
; CHECK-NEXT: shll $12, %ecx
; CHECK-NEXT: sarw $12, %cx
-; CHECK-NEXT: movq _b@{{.*}}(%rip), %rdx
-; CHECK-NEXT: movl %ecx, %esi
-; CHECK-NEXT: orw (%rdx), %si
-; CHECK-NEXT: andl %ecx, %esi
-; CHECK-NEXT: movw %si, (%rdx)
+; CHECK-NEXT: andl %edx, %ecx
+; CHECK-NEXT: movw %cx, (%rsi)
; CHECK-NEXT: retq
%load2 = load i16, i16* @a, align 4
%shl3 = shl i16 %load2, 12
Modified: llvm/trunk/test/CodeGen/X86/pr34137.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34137.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34137.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34137.ll Tue Apr 24 15:35:27 2018
@@ -10,8 +10,9 @@ define void @pr34127() {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl {{.*}}(%rip), %eax
; CHECK-NEXT: movzwl {{.*}}(%rip), %ecx
-; CHECK-NEXT: andw %ax, %cx
; CHECK-NEXT: andl %eax, %ecx
+; CHECK-NEXT: andl %eax, %ecx
+; CHECK-NEXT: movzwl %cx, %ecx
; CHECK-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: testw %cx, %cx
Modified: llvm/trunk/test/CodeGen/X86/promote-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/promote-i16.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/promote-i16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/promote-i16.ll Tue Apr 24 15:35:27 2018
@@ -5,8 +5,8 @@
define signext i16 @foo(i16 signext %x) nounwind {
; X86-LABEL: foo:
; X86: # %bb.0: # %entry
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: xorl $21998, %eax # imm = 0x55EE
+; X86-NEXT: movl $21998, %eax # imm = 0x55EE
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
;
@@ -23,8 +23,8 @@ entry:
define signext i16 @bar(i16 signext %x) nounwind {
; X86-LABEL: bar:
; X86: # %bb.0: # %entry
-; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: xorl $54766, %eax # imm = 0xD5EE
+; X86-NEXT: movl $54766, %eax # imm = 0xD5EE
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %eax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
;
Modified: llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll?rev=330781&r1=330780&r2=330781&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll Tue Apr 24 15:35:27 2018
@@ -92,14 +92,14 @@ define void @trunc_shl_32_i32_i64(i32* %
define void @trunc_shl_15_i16_i64(i16* %out, i64* %in) {
; SSE2-LABEL: trunc_shl_15_i16_i64:
; SSE2: # %bb.0:
-; SSE2-NEXT: movzwl (%rsi), %eax
+; SSE2-NEXT: movl (%rsi), %eax
; SSE2-NEXT: shll $15, %eax
; SSE2-NEXT: movw %ax, (%rdi)
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_15_i16_i64:
; AVX2: # %bb.0:
-; AVX2-NEXT: movzwl (%rsi), %eax
+; AVX2-NEXT: movl (%rsi), %eax
; AVX2-NEXT: shll $15, %eax
; AVX2-NEXT: movw %ax, (%rdi)
; AVX2-NEXT: retq
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