[PATCH] D45995: [DAGCombiner] Set the right SDLoc on a newly-created zextload

[Adrian Prantl via Phabricator via llvm-commits]

aprantl added a comment.

Are those extra pushes spills? I could imagine that changing the order of instruction affects register allocation and sufficiently increases the register pressure on i386 (which doesn't have many general purpose registers) to push it over the edge.


https://reviews.llvm.org/D45995