[llvm] r330735 - [X86][BtVer2] Fix VCVTPS2PHmr/VCVTPS2PHYmr latencies
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 24 09:26:51 PDT 2018
Author: rksimon
Date: Tue Apr 24 09:26:51 2018
New Revision: 330735
URL: http://llvm.org/viewvc/llvm-project?rev=330735&view=rev
Log:
[X86][BtVer2] Fix VCVTPS2PHmr/VCVTPS2PHYmr latencies
These are stores, not loads, so don't need to account for load latency.
Modified:
llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
llvm/trunk/test/CodeGen/X86/f16c-schedule.ll
llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s
Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=330735&r1=330734&r2=330735&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Tue Apr 24 09:26:51 2018
@@ -492,7 +492,7 @@ def : InstRW<[JWriteINSERTQ], (instrs IN
////////////////////////////////////////////////////////////////////////////////
def JWriteCVT3St: SchedWriteRes<[JFPU1, JSTC, JSAGU]> {
- let Latency = 3;
+ let Latency = 4;
}
def : InstRW<[JWriteCVT3St], (instrs VCVTPS2PHmr)>;
@@ -504,7 +504,7 @@ def JWriteCVTPS2PHY: SchedWriteRes<[JFPU
def : InstRW<[JWriteCVTPS2PHY], (instrs VCVTPS2PHYrr)>;
def JWriteCVTPS2PHYSt: SchedWriteRes<[JFPU1, JSTC, JFPX, JSAGU]> {
- let Latency = 11;
+ let Latency = 7;
let ResourceCycles = [2, 2, 2, 1];
let NumMicroOps = 3;
}
Modified: llvm/trunk/test/CodeGen/X86/f16c-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/f16c-schedule.ll?rev=330735&r1=330734&r2=330735&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/f16c-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/f16c-schedule.ll Tue Apr 24 09:26:51 2018
@@ -155,7 +155,7 @@ define <8 x i16> @test_vcvtps2ph_128(<4
; BTVER2-LABEL: test_vcvtps2ph_128:
; BTVER2: # %bb.0:
; BTVER2-NEXT: vcvtps2ph $0, %xmm0, %xmm0 # sched: [3:1.00]
-; BTVER2-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [3:1.00]
+; BTVER2-NEXT: vcvtps2ph $0, %xmm1, (%rdi) # sched: [4:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_vcvtps2ph_128:
@@ -210,7 +210,7 @@ define <8 x i16> @test_vcvtps2ph_256(<8
; BTVER2-LABEL: test_vcvtps2ph_256:
; BTVER2: # %bb.0:
; BTVER2-NEXT: vcvtps2ph $0, %ymm0, %xmm0 # sched: [6:2.00]
-; BTVER2-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [11:2.00]
+; BTVER2-NEXT: vcvtps2ph $0, %ymm1, (%rdi) # sched: [7:2.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_vcvtps2ph_256:
Modified: llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s?rev=330735&r1=330734&r2=330735&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/BtVer2/resources-f16c.s Tue Apr 24 09:26:51 2018
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
-# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 < %s | FileCheck %s
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -instruction-tables < %s | FileCheck %s
vcvtph2ps %xmm0, %xmm2
vcvtph2ps (%rax), %xmm2
@@ -13,12 +13,6 @@ vcvtps2ph $0, %xmm0, (%rax)
vcvtps2ph $0, %ymm0, %xmm2
vcvtps2ph $0, %ymm0, (%rax)
-# CHECK: Iterations: 100
-# CHECK-NEXT: Instructions: 800
-# CHECK-NEXT: Total Cycles: 1503
-# CHECK-NEXT: Dispatch Width: 2
-# CHECK-NEXT: IPC: 0.53
-
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
# CHECK-NEXT: [2]: Latency
@@ -33,9 +27,9 @@ vcvtps2ph $0, %ymm0, (%rax)
# CHECK-NEXT: 2 3 2.00 vcvtph2ps %xmm0, %ymm2
# CHECK-NEXT: 2 8 2.00 * vcvtph2ps (%rax), %ymm2
# CHECK-NEXT: 1 3 1.00 vcvtps2ph $0, %xmm0, %xmm2
-# CHECK-NEXT: 1 3 1.00 * vcvtps2ph $0, %xmm0, (%rax)
+# CHECK-NEXT: 1 4 1.00 * vcvtps2ph $0, %xmm0, (%rax)
# CHECK-NEXT: 3 6 2.00 vcvtps2ph $0, %ymm0, %xmm2
-# CHECK-NEXT: 3 11 2.00 * vcvtps2ph $0, %ymm0, (%rax)
+# CHECK-NEXT: 3 7 2.00 * vcvtps2ph $0, %ymm0, (%rax)
# CHECK: Resources:
# CHECK-NEXT: [0] - JALU0
@@ -65,6 +59,6 @@ vcvtps2ph $0, %ymm0, (%rax)
# CHECK-NEXT: - - - - - - 2.00 1.00 - - 2.00 - - - vcvtph2ps (%rax), %ymm2
# CHECK-NEXT: - - - - - - 1.00 - - - 1.00 - - - vcvtps2ph $0, %xmm0, %xmm2
# CHECK-NEXT: - - - - - - 1.00 - - 1.00 1.00 - - - vcvtps2ph $0, %xmm0, (%rax)
-# CHECK-NEXT: - - - 1.86 0.14 - 2.00 - - - 2.00 - - - vcvtps2ph $0, %ymm0, %xmm2
-# CHECK-NEXT: - - - 0.14 1.86 - 2.00 - - 1.00 2.00 - - - vcvtps2ph $0, %ymm0, (%rax)
+# CHECK-NEXT: - - - 1.00 1.00 - 2.00 - - - 2.00 - - - vcvtps2ph $0, %ymm0, %xmm2
+# CHECK-NEXT: - - - 1.00 1.00 - 2.00 - - 1.00 2.00 - - - vcvtps2ph $0, %ymm0, (%rax)
More information about the llvm-commits
mailing list