[PATCH] D45987: [AMDGPU] Truncate packed inline constant

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec created this revision.
rampitec added a reviewer: kzhuravl.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, arsenm.

If a packed inline constant is sign extended it must be truncated
after the shift. I.e. a constant (0xH0000, 0xHBC00), will be represented
as 0xFFFFFFFFBC000000 in the IR because the immediate is sign extended
to 64 bit. After the value shifted right by 16 to use it in a low part
with op_sel_hi it becomes 0xFFFFFFFFBC00 and does not qualify as inline
constant any longer.

Fixed the error and added verification code. Without the fix and with
the verification bug is causing pk_max_f16_literal.ll to fail.


https://reviews.llvm.org/D45987

Files:
  lib/Target/AMDGPU/SIFoldOperands.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  test/CodeGen/AMDGPU/pk_max_f16_literal.ll


Index: test/CodeGen/AMDGPU/pk_max_f16_literal.ll
===================================================================
--- test/CodeGen/AMDGPU/pk_max_f16_literal.ll
+++ test/CodeGen/AMDGPU/pk_max_f16_literal.ll
@@ -40,7 +40,7 @@
 }
 
 ; GCN-LABEL: {{^}}test_pk_max_f16_literal_0_m1:
-; GFX9: v_pk_max_f16 v{{[0-9]+}}, -1.0, v{{[0-9]+}} op_sel:[1,0] op_sel_hi:[0,1]{{$}}
+; GFX9: v_pk_max_f16 v{{[0-9]+}}, v{{[0-9]+}}, -1.0 op_sel:[0,1] op_sel_hi:[1,0]{{$}}
 define amdgpu_kernel void @test_pk_max_f16_literal_0_m1(<2 x half> addrspace(1)* nocapture %arg) {
 bb:
   %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
Index: lib/Target/AMDGPU/SIInstrInfo.cpp
===================================================================
--- lib/Target/AMDGPU/SIInstrInfo.cpp
+++ lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -2725,6 +2725,7 @@
     const int OpIndices[] = { Src0Idx, Src1Idx, Src2Idx };
 
     unsigned ConstantBusCount = 0;
+    unsigned LiteralCount = 0;
 
     if (AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::imm) != -1)
       ++ConstantBusCount;
@@ -2744,13 +2745,19 @@
           SGPRUsed = MO.getReg();
         } else {
           ++ConstantBusCount;
+          ++LiteralCount;
         }
       }
     }
     if (ConstantBusCount > 1) {
       ErrInfo = "VOP* instruction uses the constant bus more than once";
       return false;
     }
+
+    if (isVOP3(MI) && LiteralCount) {
+      ErrInfo = "VOP3 instruction uses literal";
+      return false;
+    }
   }
 
   // Verify misc. restrictions on specific instructions.
Index: lib/Target/AMDGPU/SIFoldOperands.cpp
===================================================================
--- lib/Target/AMDGPU/SIFoldOperands.cpp
+++ lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -178,7 +178,7 @@
         if (!(Fold.ImmToFold & 0xffff)) {
           Mod.setImm(Mod.getImm() | SISrcMods::OP_SEL_0);
           Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);
-          Old.ChangeToImmediate(Fold.ImmToFold >> 16);
+          Old.ChangeToImmediate((Fold.ImmToFold >> 16) & 0xffff);
           return true;
         }
         Mod.setImm(Mod.getImm() & ~SISrcMods::OP_SEL_1);


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