[llvm] r330731 - [InstCombine] regenerate checks; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 24 09:08:04 PDT 2018
Author: spatel
Date: Tue Apr 24 09:08:03 2018
New Revision: 330731
URL: http://llvm.org/viewvc/llvm-project?rev=330731&view=rev
Log:
[InstCombine] regenerate checks; NFC
The first step in fixing problems raised in D45862
is to make the problems visible. Now we can more easily
see/update cases where selects have been turned into
multiple instructions with no apparent improvement in
analysis or benefits for other passes (vectorization).
Modified:
llvm/trunk/test/Transforms/InstCombine/select.ll
Modified: llvm/trunk/test/Transforms/InstCombine/select.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/select.ll?rev=330731&r1=330730&r2=330731&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/select.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/select.ll Tue Apr 24 09:08:03 2018
@@ -6,52 +6,54 @@
target datalayout = "e-p:64:64-p1:16:16-p2:32:32:32-p3:64:64:64"
define i32 @test1(i32 %A, i32 %B) {
- %C = select i1 false, i32 %A, i32 %B
- ret i32 %C
; CHECK-LABEL: @test1(
-; CHECK: ret i32 %B
+; CHECK-NEXT: ret i32 [[B:%.*]]
+;
+ %C = select i1 false, i32 %A, i32 %B
+ ret i32 %C
}
define i32 @test2(i32 %A, i32 %B) {
- %C = select i1 true, i32 %A, i32 %B
- ret i32 %C
; CHECK-LABEL: @test2(
-; CHECK: ret i32 %A
+; CHECK-NEXT: ret i32 [[A:%.*]]
+;
+ %C = select i1 true, i32 %A, i32 %B
+ ret i32 %C
}
define i32 @test3(i1 %C, i32 %I) {
- ; V = I
- %V = select i1 %C, i32 %I, i32 %I
- ret i32 %V
; CHECK-LABEL: @test3(
-; CHECK: ret i32 %I
+; CHECK-NEXT: ret i32 [[I:%.*]]
+;
+ %V = select i1 %C, i32 %I, i32 %I
+ ret i32 %V
}
define i1 @test4(i1 %C) {
- ; V = C
- %V = select i1 %C, i1 true, i1 false
- ret i1 %V
; CHECK-LABEL: @test4(
-; CHECK: ret i1 %C
+; CHECK-NEXT: ret i1 [[C:%.*]]
+;
+ %V = select i1 %C, i1 true, i1 false
+ ret i1 %V
}
define i1 @test5(i1 %C) {
- ; V = !C
- %V = select i1 %C, i1 false, i1 true
- ret i1 %V
; CHECK-LABEL: @test5(
-; CHECK: xor i1 %C, true
-; CHECK: ret i1
+; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: ret i1 [[NOT_C]]
+;
+ %V = select i1 %C, i1 false, i1 true
+ ret i1 %V
}
define i32 @test6(i1 %C) {
- ; V = cast C to int
- %V = select i1 %C, i32 1, i32 0
- ret i32 %V
; CHECK-LABEL: @test6(
-; CHECK: %V = zext i1 %C to i32
-; CHECK: ret i32 %V
+; CHECK-NEXT: [[V:%.*]] = zext i1 [[C:%.*]] to i32
+; CHECK-NEXT: ret i32 [[V]]
+;
+ %V = select i1 %C, i32 1, i32 0
+ ret i32 %V
}
define i1 @trueval_is_true(i1 %C, i1 %X) {
@@ -83,7 +85,7 @@ define <2 x i1> @trueval_is_true_vec_und
define i1 @test8(i1 %C, i1 %X) {
; CHECK-LABEL: @test8(
-; CHECK-NEXT: [[R:%.*]] = and i1 %C, %X
+; CHECK-NEXT: [[R:%.*]] = and i1 [[C:%.*]], [[X:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%R = select i1 %C, i1 %X, i1 false
@@ -92,7 +94,7 @@ define i1 @test8(i1 %C, i1 %X) {
define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @test8vec(
-; CHECK-NEXT: [[R:%.*]] = and <2 x i1> %C, %X
+; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[C:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 false, i1 false>
@@ -101,8 +103,8 @@ define <2 x i1> @test8vec(<2 x i1> %C, <
define i1 @test9(i1 %C, i1 %X) {
; CHECK-LABEL: @test9(
-; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 %C, true
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_C]], %X
+; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_C]], [[X:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%R = select i1 %C, i1 false, i1 %X
@@ -111,8 +113,8 @@ define i1 @test9(i1 %C, i1 %X) {
define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @test9vec(
-; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> %C, <i1 true, i1 true>
-; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[NOT_C]], %X
+; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], <i1 true, i1 true>
+; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[NOT_C]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> <i1 false, i1 false>, <2 x i1> %X
@@ -121,8 +123,8 @@ define <2 x i1> @test9vec(<2 x i1> %C, <
define i1 @test10(i1 %C, i1 %X) {
; CHECK-LABEL: @test10(
-; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 %C, true
-; CHECK-NEXT: [[R:%.*]] = or i1 [[NOT_C]], %X
+; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[R:%.*]] = or i1 [[NOT_C]], [[X:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%R = select i1 %C, i1 %X, i1 true
@@ -131,8 +133,8 @@ define i1 @test10(i1 %C, i1 %X) {
define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @test10vec(
-; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> %C, <i1 true, i1 true>
-; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[NOT_C]], %X
+; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], <i1 true, i1 true>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[NOT_C]], [[X:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 true, i1 true>
@@ -141,7 +143,7 @@ define <2 x i1> @test10vec(<2 x i1> %C,
define i1 @test23(i1 %a, i1 %b) {
; CHECK-LABEL: @test23(
-; CHECK-NEXT: [[C:%.*]] = and i1 %a, %b
+; CHECK-NEXT: [[C:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%c = select i1 %a, i1 %b, i1 %a
@@ -150,7 +152,7 @@ define i1 @test23(i1 %a, i1 %b) {
define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) {
; CHECK-LABEL: @test23vec(
-; CHECK-NEXT: [[C:%.*]] = and <2 x i1> %a, %b
+; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%c = select <2 x i1> %a, <2 x i1> %b, <2 x i1> %a
@@ -159,7 +161,7 @@ define <2 x i1> @test23vec(<2 x i1> %a,
define i1 @test24(i1 %a, i1 %b) {
; CHECK-LABEL: @test24(
-; CHECK-NEXT: [[C:%.*]] = or i1 %a, %b
+; CHECK-NEXT: [[C:%.*]] = or i1 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%c = select i1 %a, i1 %a, i1 %b
@@ -168,7 +170,7 @@ define i1 @test24(i1 %a, i1 %b) {
define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) {
; CHECK-LABEL: @test24vec(
-; CHECK-NEXT: [[C:%.*]] = or <2 x i1> %a, %b
+; CHECK-NEXT: [[C:%.*]] = or <2 x i1> [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%c = select <2 x i1> %a, <2 x i1> %a, <2 x i1> %b
@@ -177,8 +179,8 @@ define <2 x i1> @test24vec(<2 x i1> %a,
define i1 @test62(i1 %A, i1 %B) {
; CHECK-LABEL: @test62(
-; CHECK-NEXT: [[NOT:%.*]] = xor i1 %A, true
-; CHECK-NEXT: [[C:%.*]] = and i1 [[NOT]], %B
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[A:%.*]], true
+; CHECK-NEXT: [[C:%.*]] = and i1 [[NOT]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%not = xor i1 %A, true
@@ -188,8 +190,8 @@ define i1 @test62(i1 %A, i1 %B) {
define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) {
; CHECK-LABEL: @test62vec(
-; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> %A, <i1 true, i1 true>
-; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[NOT]], %B
+; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> [[A:%.*]], <i1 true, i1 true>
+; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[NOT]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%not = xor <2 x i1> %A, <i1 true, i1 true>
@@ -199,8 +201,8 @@ define <2 x i1> @test62vec(<2 x i1> %A,
define i1 @test63(i1 %A, i1 %B) {
; CHECK-LABEL: @test63(
-; CHECK-NEXT: [[NOT:%.*]] = xor i1 %A, true
-; CHECK-NEXT: [[C:%.*]] = or i1 [[NOT]], %B
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[A:%.*]], true
+; CHECK-NEXT: [[C:%.*]] = or i1 [[NOT]], [[B:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%not = xor i1 %A, true
@@ -210,8 +212,8 @@ define i1 @test63(i1 %A, i1 %B) {
define <2 x i1> @test63vec(<2 x i1> %A, <2 x i1> %B) {
; CHECK-LABEL: @test63vec(
-; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> %A, <i1 true, i1 true>
-; CHECK-NEXT: [[C:%.*]] = or <2 x i1> [[NOT]], %B
+; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> [[A:%.*]], <i1 true, i1 true>
+; CHECK-NEXT: [[C:%.*]] = or <2 x i1> [[NOT]], [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%not = xor <2 x i1> %A, <i1 true, i1 true>
@@ -220,23 +222,25 @@ define <2 x i1> @test63vec(<2 x i1> %A,
}
define i32 @test11(i32 %a) {
- %C = icmp eq i32 %a, 0
- %R = select i1 %C, i32 0, i32 1
- ret i32 %R
; CHECK-LABEL: @test11(
-; CHECK: icmp ne i32 %a, 0
-; CHECK: %R = zext i1
-; CHECK: ret i32 %R
+; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT: [[R:%.*]] = zext i1 [[C]] to i32
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %C = icmp eq i32 %a, 0
+ %R = select i1 %C, i32 0, i32 1
+ ret i32 %R
}
define i32 @test12(i1 %cond, i32 %a) {
- %b = or i32 %a, 1
- %c = select i1 %cond, i32 %b, i32 %a
- ret i32 %c
; CHECK-LABEL: @test12(
-; CHECK: %b = zext i1 %cond to i32
-; CHECK: %c = or i32 %b, %a
-; CHECK: ret i32 %c
+; CHECK-NEXT: [[B:%.*]] = zext i1 [[COND:%.*]] to i32
+; CHECK-NEXT: [[C:%.*]] = or i32 [[B]], [[A:%.*]]
+; CHECK-NEXT: ret i32 [[C]]
+;
+ %b = or i32 %a, 1
+ %c = select i1 %cond, i32 %b, i32 %a
+ ret i32 %c
}
define <2 x i32> @test12vec(<2 x i1> %cond, <2 x i32> %a) {
@@ -251,13 +255,14 @@ define <2 x i32> @test12vec(<2 x i1> %co
}
define i32 @test12a(i1 %cond, i32 %a) {
- %b = ashr i32 %a, 1
- %c = select i1 %cond, i32 %b, i32 %a
- ret i32 %c
; CHECK-LABEL: @test12a(
-; CHECK: %b = zext i1 %cond to i32
-; CHECK: %c = ashr i32 %a, %b
-; CHECK: ret i32 %c
+; CHECK-NEXT: [[B:%.*]] = zext i1 [[COND:%.*]] to i32
+; CHECK-NEXT: [[C:%.*]] = ashr i32 [[A:%.*]], [[B]]
+; CHECK-NEXT: ret i32 [[C]]
+;
+ %b = ashr i32 %a, 1
+ %c = select i1 %cond, i32 %b, i32 %a
+ ret i32 %c
}
define <2 x i32> @test12avec(<2 x i1> %cond, <2 x i32> %a) {
@@ -273,9 +278,9 @@ define <2 x i32> @test12avec(<2 x i1> %c
define i32 @test12b(i1 %cond, i32 %a) {
; CHECK-LABEL: @test12b(
-; CHECK-NEXT: [[NOT_COND:%.*]] = xor i1 %cond, true
+; CHECK-NEXT: [[NOT_COND:%.*]] = xor i1 [[COND:%.*]], true
; CHECK-NEXT: [[B:%.*]] = zext i1 [[NOT_COND]] to i32
-; CHECK-NEXT: [[D:%.*]] = ashr i32 %a, [[B]]
+; CHECK-NEXT: [[D:%.*]] = ashr i32 [[A:%.*]], [[B]]
; CHECK-NEXT: ret i32 [[D]]
;
%b = ashr i32 %a, 1
@@ -296,260 +301,294 @@ define <2 x i32> @test12bvec(<2 x i1> %c
}
define i32 @test13(i32 %a, i32 %b) {
- %C = icmp eq i32 %a, %b
- %V = select i1 %C, i32 %a, i32 %b
- ret i32 %V
; CHECK-LABEL: @test13(
-; CHECK: ret i32 %b
+; CHECK-NEXT: ret i32 [[B:%.*]]
+;
+ %C = icmp eq i32 %a, %b
+ %V = select i1 %C, i32 %a, i32 %b
+ ret i32 %V
}
define i32 @test13a(i32 %a, i32 %b) {
- %C = icmp ne i32 %a, %b
- %V = select i1 %C, i32 %a, i32 %b
- ret i32 %V
; CHECK-LABEL: @test13a(
-; CHECK: ret i32 %a
+; CHECK-NEXT: ret i32 [[A:%.*]]
+;
+ %C = icmp ne i32 %a, %b
+ %V = select i1 %C, i32 %a, i32 %b
+ ret i32 %V
}
define i32 @test13b(i32 %a, i32 %b) {
- %C = icmp eq i32 %a, %b
- %V = select i1 %C, i32 %b, i32 %a
- ret i32 %V
; CHECK-LABEL: @test13b(
-; CHECK: ret i32 %a
+; CHECK-NEXT: ret i32 [[A:%.*]]
+;
+ %C = icmp eq i32 %a, %b
+ %V = select i1 %C, i32 %b, i32 %a
+ ret i32 %V
}
define i1 @test14a(i1 %C, i32 %X) {
- %V = select i1 %C, i32 %X, i32 0
- ; (X < 1) | !C
- %R = icmp slt i32 %V, 1
- ret i1 %R
; CHECK-LABEL: @test14a(
-; CHECK: icmp slt i32 %X, 1
-; CHECK: xor i1 %C, true
-; CHECK: or i1
-; CHECK: ret i1 %R
+; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1
+; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[R:%.*]] = or i1 [[R1]], [[NOT_C]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %V = select i1 %C, i32 %X, i32 0
+ ; (X < 1) | !C
+ %R = icmp slt i32 %V, 1
+ ret i1 %R
}
define i1 @test14b(i1 %C, i32 %X) {
- %V = select i1 %C, i32 0, i32 %X
- ; (X < 1) | C
- %R = icmp slt i32 %V, 1
- ret i1 %R
; CHECK-LABEL: @test14b(
-; CHECK: icmp slt i32 %X, 1
-; CHECK: or i1
-; CHECK: ret i1 %R
+; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1
+; CHECK-NEXT: [[R:%.*]] = or i1 [[R1]], [[C:%.*]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %V = select i1 %C, i32 0, i32 %X
+ ; (X < 1) | C
+ %R = icmp slt i32 %V, 1
+ ret i1 %R
}
;; Code sequence for (X & 16) ? 16 : 0
define i32 @test15a(i32 %X) {
- %t1 = and i32 %X, 16
- %t2 = icmp eq i32 %t1, 0
- %t3 = select i1 %t2, i32 0, i32 16
- ret i32 %t3
; CHECK-LABEL: @test15a(
-; CHECK: %t1 = and i32 %X, 16
-; CHECK: ret i32 %t1
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 16
+; CHECK-NEXT: ret i32 [[T1]]
+;
+ %t1 = and i32 %X, 16
+ %t2 = icmp eq i32 %t1, 0
+ %t3 = select i1 %t2, i32 0, i32 16
+ ret i32 %t3
}
;; Code sequence for (X & 32) ? 0 : 24
define i32 @test15b(i32 %X) {
- %t1 = and i32 %X, 32
- %t2 = icmp eq i32 %t1, 0
- %t3 = select i1 %t2, i32 32, i32 0
- ret i32 %t3
; CHECK-LABEL: @test15b(
-; CHECK: %t1 = and i32 %X, 32
-; CHECK: xor i32 %t1, 32
-; CHECK: ret i32
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 32
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[T1]], 32
+; CHECK-NEXT: ret i32 [[TMP1]]
+;
+ %t1 = and i32 %X, 32
+ %t2 = icmp eq i32 %t1, 0
+ %t3 = select i1 %t2, i32 32, i32 0
+ ret i32 %t3
}
;; Alternate code sequence for (X & 16) ? 16 : 0
define i32 @test15c(i32 %X) {
- %t1 = and i32 %X, 16
- %t2 = icmp eq i32 %t1, 16
- %t3 = select i1 %t2, i32 16, i32 0
- ret i32 %t3
; CHECK-LABEL: @test15c(
-; CHECK: %t1 = and i32 %X, 16
-; CHECK: ret i32 %t1
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 16
+; CHECK-NEXT: ret i32 [[T1]]
+;
+ %t1 = and i32 %X, 16
+ %t2 = icmp eq i32 %t1, 16
+ %t3 = select i1 %t2, i32 16, i32 0
+ ret i32 %t3
}
;; Alternate code sequence for (X & 16) ? 16 : 0
define i32 @test15d(i32 %X) {
- %t1 = and i32 %X, 16
- %t2 = icmp ne i32 %t1, 0
- %t3 = select i1 %t2, i32 16, i32 0
- ret i32 %t3
; CHECK-LABEL: @test15d(
-; CHECK: %t1 = and i32 %X, 16
-; CHECK: ret i32 %t1
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 16
+; CHECK-NEXT: ret i32 [[T1]]
+;
+ %t1 = and i32 %X, 16
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 16, i32 0
+ ret i32 %t3
}
;; (a & 128) ? 256 : 0
define i32 @test15e(i32 %X) {
- %t1 = and i32 %X, 128
- %t2 = icmp ne i32 %t1, 0
- %t3 = select i1 %t2, i32 256, i32 0
- ret i32 %t3
; CHECK-LABEL: @test15e(
-; CHECK: %t1 = shl i32 %X, 1
-; CHECK: and i32 %t1, 256
-; CHECK: ret i32
+; CHECK-NEXT: [[T1:%.*]] = shl i32 [[X:%.*]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[T1]], 256
+; CHECK-NEXT: ret i32 [[TMP1]]
+;
+ %t1 = and i32 %X, 128
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 256, i32 0
+ ret i32 %t3
}
;; (a & 128) ? 0 : 256
define i32 @test15f(i32 %X) {
- %t1 = and i32 %X, 128
- %t2 = icmp ne i32 %t1, 0
- %t3 = select i1 %t2, i32 0, i32 256
- ret i32 %t3
; CHECK-LABEL: @test15f(
-; CHECK: %t1 = shl i32 %X, 1
-; CHECK: and i32 %t1, 256
-; CHECK: xor i32 %{{.*}}, 256
-; CHECK: ret i32
+; CHECK-NEXT: [[T1:%.*]] = shl i32 [[X:%.*]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[T1]], 256
+; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 256
+; CHECK-NEXT: ret i32 [[TMP2]]
+;
+ %t1 = and i32 %X, 128
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 0, i32 256
+ ret i32 %t3
}
;; (a & 8) ? -1 : -9
define i32 @test15g(i32 %X) {
- %t1 = and i32 %X, 8
- %t2 = icmp ne i32 %t1, 0
- %t3 = select i1 %t2, i32 -1, i32 -9
- ret i32 %t3
; CHECK-LABEL: @test15g(
-; CHECK-NEXT: %1 = or i32 %X, -9
-; CHECK-NEXT: ret i32 %1
+; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], -9
+; CHECK-NEXT: ret i32 [[TMP1]]
+;
+ %t1 = and i32 %X, 8
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 -1, i32 -9
+ ret i32 %t3
}
;; (a & 8) ? -9 : -1
define i32 @test15h(i32 %X) {
- %t1 = and i32 %X, 8
- %t2 = icmp ne i32 %t1, 0
- %t3 = select i1 %t2, i32 -9, i32 -1
- ret i32 %t3
; CHECK-LABEL: @test15h(
-; CHECK-NEXT: %1 = or i32 %X, -9
-; CHECK-NEXT: %2 = xor i32 %1, 8
-; CHECK-NEXT: ret i32 %2
+; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], -9
+; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 8
+; CHECK-NEXT: ret i32 [[TMP2]]
+;
+ %t1 = and i32 %X, 8
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 -9, i32 -1
+ ret i32 %t3
}
;; (a & 2) ? 577 : 1089
define i32 @test15i(i32 %X) {
- %t1 = and i32 %X, 2
- %t2 = icmp ne i32 %t1, 0
- %t3 = select i1 %t2, i32 577, i32 1089
- ret i32 %t3
; CHECK-LABEL: @test15i(
-; CHECK-NEXT: %t1 = shl i32 %X, 8
-; CHECK-NEXT: %1 = and i32 %t1, 512
-; CHECK-NEXT: %2 = xor i32 %1, 512
-; CHECK-NEXT: %3 = add nuw nsw i32 %2, 577
-; CHECK-NEXT: ret i32 %3
+; CHECK-NEXT: [[T1:%.*]] = shl i32 [[X:%.*]], 8
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[T1]], 512
+; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP1]], 512
+; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP2]], 577
+; CHECK-NEXT: ret i32 [[TMP3]]
+;
+ %t1 = and i32 %X, 2
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 577, i32 1089
+ ret i32 %t3
}
;; (a & 2) ? 1089 : 577
define i32 @test15j(i32 %X) {
- %t1 = and i32 %X, 2
- %t2 = icmp ne i32 %t1, 0
- %t3 = select i1 %t2, i32 1089, i32 577
- ret i32 %t3
; CHECK-LABEL: @test15j(
-; CHECK-NEXT: %t1 = shl i32 %X, 8
-; CHECK-NEXT: %1 = and i32 %t1, 512
-; CHECK-NEXT: %2 = add nuw nsw i32 %1, 577
-; CHECK-NEXT: ret i32 %2
+; CHECK-NEXT: [[T1:%.*]] = shl i32 [[X:%.*]], 8
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[T1]], 512
+; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i32 [[TMP1]], 577
+; CHECK-NEXT: ret i32 [[TMP2]]
+;
+ %t1 = and i32 %X, 2
+ %t2 = icmp ne i32 %t1, 0
+ %t3 = select i1 %t2, i32 1089, i32 577
+ ret i32 %t3
}
define i32 @test16(i1 %C, i32* %P) {
- %P2 = select i1 %C, i32* %P, i32* null
- %V = load i32, i32* %P2
- ret i32 %V
; CHECK-LABEL: @test16(
-; CHECK-NEXT: %V = load i32, i32* %P
-; CHECK: ret i32 %V
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
+ %P2 = select i1 %C, i32* %P, i32* null
+ %V = load i32, i32* %P2
+ ret i32 %V
}
;; It may be legal to load from a null address in a non-zero address space
define i32 @test16_neg(i1 %C, i32 addrspace(1)* %P) {
- %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null
- %V = load i32, i32 addrspace(1)* %P2
- ret i32 %V
-; CHECK-LABEL: @test16_neg
-; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null
-; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2
-; CHECK: ret i32 %V
+; CHECK-LABEL: @test16_neg(
+; CHECK-NEXT: [[P2:%.*]] = select i1 [[C:%.*]], i32 addrspace(1)* [[P:%.*]], i32 addrspace(1)* null
+; CHECK-NEXT: [[V:%.*]] = load i32, i32 addrspace(1)* [[P2]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
+ %P2 = select i1 %C, i32 addrspace(1)* %P, i32 addrspace(1)* null
+ %V = load i32, i32 addrspace(1)* %P2
+ ret i32 %V
}
+
define i32 @test16_neg2(i1 %C, i32 addrspace(1)* %P) {
- %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P
- %V = load i32, i32 addrspace(1)* %P2
- ret i32 %V
-; CHECK-LABEL: @test16_neg2
-; CHECK-NEXT: %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P
-; CHECK-NEXT: %V = load i32, i32 addrspace(1)* %P2
-; CHECK: ret i32 %V
+; CHECK-LABEL: @test16_neg2(
+; CHECK-NEXT: [[P2:%.*]] = select i1 [[C:%.*]], i32 addrspace(1)* null, i32 addrspace(1)* [[P:%.*]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32 addrspace(1)* [[P2]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
+ %P2 = select i1 %C, i32 addrspace(1)* null, i32 addrspace(1)* %P
+ %V = load i32, i32 addrspace(1)* %P2
+ ret i32 %V
}
define i1 @test17(i32* %X, i1 %C) {
- %R = select i1 %C, i32* %X, i32* null
- %RV = icmp eq i32* %R, null
- ret i1 %RV
; CHECK-LABEL: @test17(
-; CHECK: icmp eq i32* %X, null
-; CHECK: xor i1 %C, true
-; CHECK: %RV = or i1
-; CHECK: ret i1 %RV
+; CHECK-NEXT: [[RV1:%.*]] = icmp eq i32* [[X:%.*]], null
+; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[RV:%.*]] = or i1 [[RV1]], [[NOT_C]]
+; CHECK-NEXT: ret i1 [[RV]]
+;
+ %R = select i1 %C, i32* %X, i32* null
+ %RV = icmp eq i32* %R, null
+ ret i1 %RV
}
define i32 @test18(i32 %X, i32 %Y, i1 %C) {
- %R = select i1 %C, i32 %X, i32 0
- %V = sdiv i32 %Y, %R
- ret i32 %V
; CHECK-LABEL: @test18(
-; CHECK: %V = sdiv i32 %Y, %X
-; CHECK: ret i32 %V
+; CHECK-NEXT: [[V:%.*]] = sdiv i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: ret i32 [[V]]
+;
+ %R = select i1 %C, i32 %X, i32 0
+ %V = sdiv i32 %Y, %R
+ ret i32 %V
}
define i32 @test19(i32 %x) {
- %tmp = icmp ugt i32 %x, 2147483647
- %retval = select i1 %tmp, i32 -1, i32 0
- ret i32 %retval
; CHECK-LABEL: @test19(
-; CHECK-NEXT: ashr i32 %x, 31
-; CHECK-NEXT: ret i32
+; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT: ret i32 [[X_LOBIT]]
+;
+ %tmp = icmp ugt i32 %x, 2147483647
+ %retval = select i1 %tmp, i32 -1, i32 0
+ ret i32 %retval
}
define i32 @test20(i32 %x) {
- %tmp = icmp slt i32 %x, 0
- %retval = select i1 %tmp, i32 -1, i32 0
- ret i32 %retval
; CHECK-LABEL: @test20(
-; CHECK-NEXT: ashr i32 %x, 31
-; CHECK-NEXT: ret i32
+; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT: ret i32 [[X_LOBIT]]
+;
+ %tmp = icmp slt i32 %x, 0
+ %retval = select i1 %tmp, i32 -1, i32 0
+ ret i32 %retval
}
define i64 @test21(i32 %x) {
- %tmp = icmp slt i32 %x, 0
- %retval = select i1 %tmp, i64 -1, i64 0
- ret i64 %retval
; CHECK-LABEL: @test21(
-; CHECK-NEXT: ashr i32 %x, 31
-; CHECK-NEXT: sext i32
-; CHECK-NEXT: ret i64
+; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X_LOBIT]] to i64
+; CHECK-NEXT: ret i64 [[TMP1]]
+;
+ %tmp = icmp slt i32 %x, 0
+ %retval = select i1 %tmp, i64 -1, i64 0
+ ret i64 %retval
}
define i16 @test22(i32 %x) {
- %tmp = icmp slt i32 %x, 0
- %retval = select i1 %tmp, i16 -1, i16 0
- ret i16 %retval
; CHECK-LABEL: @test22(
-; CHECK-NEXT: ashr i32 %x, 31
-; CHECK-NEXT: trunc i32
-; CHECK-NEXT: ret i16
+; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X_LOBIT]] to i16
+; CHECK-NEXT: ret i16 [[TMP1]]
+;
+ %tmp = icmp slt i32 %x, 0
+ %retval = select i1 %tmp, i16 -1, i16 0
+ ret i16 %retval
}
define i32 @test25(i1 %c) {
+; CHECK-LABEL: @test25(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[C:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
+; CHECK: jump:
+; CHECK-NEXT: br label [[RET]]
+; CHECK: ret:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ 10, [[JUMP]] ], [ 20, [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[A]]
+;
entry:
br i1 %c, label %jump, label %ret
jump:
@@ -558,12 +597,18 @@ ret:
%a = phi i1 [true, %jump], [false, %entry]
%b = select i1 %a, i32 10, i32 20
ret i32 %b
-; CHECK-LABEL: @test25(
-; CHECK: %a = phi i32 [ 10, %jump ], [ 20, %entry ]
-; CHECK-NEXT: ret i32 %a
}
define i32 @test26(i1 %cond) {
+; CHECK-LABEL: @test26(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
+; CHECK: jump:
+; CHECK-NEXT: br label [[RET]]
+; CHECK: ret:
+; CHECK-NEXT: [[A:%.*]] = phi i32 [ 20, [[ENTRY:%.*]] ], [ 10, [[JUMP]] ]
+; CHECK-NEXT: ret i32 [[A]]
+;
entry:
br i1 %cond, label %jump, label %ret
jump:
@@ -573,124 +618,151 @@ ret:
%a = phi i1 [true, %entry], [%c, %jump]
%b = select i1 %a, i32 20, i32 10
ret i32 %b
-; CHECK-LABEL: @test26(
-; CHECK: %a = phi i32 [ 20, %entry ], [ 10, %jump ]
-; CHECK-NEXT: ret i32 %a
}
define i32 @test27(i1 %c, i32 %A, i32 %B) {
+; CHECK-LABEL: @test27(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[C:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
+; CHECK: jump:
+; CHECK-NEXT: br label [[RET]]
+; CHECK: ret:
+; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[P]]
+;
entry:
br i1 %c, label %jump, label %ret
jump:
br label %ret
ret:
- %a = phi i1 [true, %jump], [false, %entry]
- %b = select i1 %a, i32 %A, i32 %B
- ret i32 %b
-; CHECK-LABEL: @test27(
-; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ]
-; CHECK-NEXT: ret i32 %a
+ %p = phi i1 [true, %jump], [false, %entry]
+ %s = select i1 %p, i32 %A, i32 %B
+ ret i32 %s
}
define i32 @test28(i1 %cond, i32 %A, i32 %B) {
+; CHECK-LABEL: @test28(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
+; CHECK: jump:
+; CHECK-NEXT: br label [[RET]]
+; CHECK: ret:
+; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: ret i32 [[P]]
+;
entry:
br i1 %cond, label %jump, label %ret
jump:
br label %ret
ret:
%c = phi i32 [%A, %jump], [%B, %entry]
- %a = phi i1 [true, %jump], [false, %entry]
- %b = select i1 %a, i32 %A, i32 %c
- ret i32 %b
-; CHECK-LABEL: @test28(
-; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ]
-; CHECK-NEXT: ret i32 %a
+ %p = phi i1 [true, %jump], [false, %entry]
+ %s = select i1 %p, i32 %A, i32 %c
+ ret i32 %s
}
define i32 @test29(i1 %cond, i32 %A, i32 %B) {
+; CHECK-LABEL: @test29(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 [[COND:%.*]], label [[JUMP:%.*]], label [[RET:%.*]]
+; CHECK: jump:
+; CHECK-NEXT: br label [[RET]]
+; CHECK: ret:
+; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[A:%.*]], [[JUMP]] ], [ [[B:%.*]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: br label [[NEXT:%.*]]
+; CHECK: next:
+; CHECK-NEXT: ret i32 [[P]]
+;
entry:
br i1 %cond, label %jump, label %ret
jump:
br label %ret
ret:
%c = phi i32 [%A, %jump], [%B, %entry]
- %a = phi i1 [true, %jump], [false, %entry]
+ %p = phi i1 [true, %jump], [false, %entry]
br label %next
next:
- %b = select i1 %a, i32 %A, i32 %c
- ret i32 %b
-; CHECK-LABEL: @test29(
-; CHECK: %a = phi i32 [ %A, %jump ], [ %B, %entry ]
-; CHECK: ret i32 %a
+ %s = select i1 %p, i32 %A, i32 %c
+ ret i32 %s
}
-
; SMAX(SMAX(x, y), x) -> SMAX(x, y)
define i32 @test30(i32 %x, i32 %y) {
+; CHECK-LABEL: @test30(
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
%cmp = icmp sgt i32 %x, %y
%cond = select i1 %cmp, i32 %x, i32 %y
-
%cmp5 = icmp sgt i32 %cond, %x
%retval = select i1 %cmp5, i32 %cond, i32 %x
ret i32 %retval
-; CHECK-LABEL: @test30(
-; CHECK: ret i32 %cond
}
; UMAX(UMAX(x, y), x) -> UMAX(x, y)
define i32 @test31(i32 %x, i32 %y) {
+; CHECK-LABEL: @test31(
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
%cmp = icmp ugt i32 %x, %y
%cond = select i1 %cmp, i32 %x, i32 %y
%cmp5 = icmp ugt i32 %cond, %x
%retval = select i1 %cmp5, i32 %cond, i32 %x
ret i32 %retval
-; CHECK-LABEL: @test31(
-; CHECK: ret i32 %cond
}
; SMIN(SMIN(x, y), x) -> SMIN(x, y)
define i32 @test32(i32 %x, i32 %y) {
+; CHECK-LABEL: @test32(
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[X]]
+; CHECK-NEXT: ret i32 [[COND]]
+;
%cmp = icmp sgt i32 %x, %y
%cond = select i1 %cmp, i32 %y, i32 %x
%cmp5 = icmp sgt i32 %cond, %x
%retval = select i1 %cmp5, i32 %x, i32 %cond
ret i32 %retval
-; CHECK-LABEL: @test32(
-; CHECK: ret i32 %cond
}
; MAX(MIN(x, y), x) -> x
define i32 @test33(i32 %x, i32 %y) {
+; CHECK-LABEL: @test33(
+; CHECK-NEXT: ret i32 [[X:%.*]]
+;
%cmp = icmp sgt i32 %x, %y
%cond = select i1 %cmp, i32 %y, i32 %x
%cmp5 = icmp sgt i32 %cond, %x
%retval = select i1 %cmp5, i32 %cond, i32 %x
ret i32 %retval
-; CHECK-LABEL: @test33(
-; CHECK: ret i32 %x
}
; MIN(MAX(x, y), x) -> x
define i32 @test34(i32 %x, i32 %y) {
+; CHECK-LABEL: @test34(
+; CHECK-NEXT: ret i32 [[X:%.*]]
+;
%cmp = icmp sgt i32 %x, %y
%cond = select i1 %cmp, i32 %x, i32 %y
%cmp5 = icmp sgt i32 %cond, %x
%retval = select i1 %cmp5, i32 %x, i32 %cond
ret i32 %retval
-; CHECK-LABEL: @test34(
-; CHECK: ret i32 %x
}
define i32 @test35(i32 %x) {
+; CHECK-LABEL: @test35(
+; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 40
+; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i32 [[TMP2]], 60
+; CHECK-NEXT: ret i32 [[TMP3]]
+;
%cmp = icmp sge i32 %x, 0
%cond = select i1 %cmp, i32 60, i32 100
ret i32 %cond
-; CHECK-LABEL: @test35(
-; CHECK: ashr i32 %x, 31
-; CHECK: and i32 {{.*}}, 40
-; CHECK: add nuw nsw i32 {{.*}}, 60
-; CHECK: ret
}
define <2 x i32> @test35vec(<2 x i32> %x) {
@@ -721,14 +793,15 @@ define i32 @test35_with_trunc(i64 %x) {
}
define i32 @test36(i32 %x) {
+; CHECK-LABEL: @test36(
+; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -40
+; CHECK-NEXT: [[TMP3:%.*]] = add nsw i32 [[TMP2]], 100
+; CHECK-NEXT: ret i32 [[TMP3]]
+;
%cmp = icmp slt i32 %x, 0
%cond = select i1 %cmp, i32 60, i32 100
ret i32 %cond
-; CHECK-LABEL: @test36(
-; CHECK: ashr i32 %x, 31
-; CHECK: and i32 {{.*}}, -40
-; CHECK: add nsw i32 {{.*}}, 100
-; CHECK: ret
}
define <2 x i32> @test36vec(<2 x i32> %x) {
@@ -744,13 +817,14 @@ define <2 x i32> @test36vec(<2 x i32> %x
}
define i32 @test37(i32 %x) {
+; CHECK-LABEL: @test37(
+; CHECK-NEXT: [[TMP1:%.*]] = ashr i32 [[X:%.*]], 31
+; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], 1
+; CHECK-NEXT: ret i32 [[TMP2]]
+;
%cmp = icmp sgt i32 %x, -1
%cond = select i1 %cmp, i32 1, i32 -1
ret i32 %cond
-; CHECK-LABEL: @test37(
-; CHECK: ashr i32 %x, 31
-; CHECK: or i32 {{.*}}, 1
-; CHECK: ret
}
define <2 x i32> @test37vec(<2 x i32> %x) {
@@ -765,54 +839,59 @@ define <2 x i32> @test37vec(<2 x i32> %x
}
define i1 @test38(i1 %cond) {
+; CHECK-LABEL: @test38(
+; CHECK-NEXT: ret i1 false
+;
%zero = alloca i32
%one = alloca i32
%ptr = select i1 %cond, i32* %zero, i32* %one
%isnull = icmp eq i32* %ptr, null
ret i1 %isnull
-; CHECK-LABEL: @test38(
-; CHECK: ret i1 false
}
define i1 @test39(i1 %cond, double %x) {
+; CHECK-LABEL: @test39(
+; CHECK-NEXT: ret i1 true
+;
%s = select i1 %cond, double %x, double 0x7FF0000000000000 ; RHS = +infty
%cmp = fcmp ule double %x, %s
ret i1 %cmp
-; CHECK-LABEL: @test39(
-; CHECK: ret i1 true
}
define i1 @test40(i1 %cond) {
+; CHECK-LABEL: @test40(
+; CHECK-NEXT: ret i1 false
+;
%a = alloca i32
%b = alloca i32
%c = alloca i32
%s = select i1 %cond, i32* %a, i32* %b
%r = icmp eq i32* %s, %c
ret i1 %r
-; CHECK-LABEL: @test40(
-; CHECK: ret i1 false
}
define i32 @test41(i1 %cond, i32 %x, i32 %y) {
+; CHECK-LABEL: @test41(
+; CHECK-NEXT: [[R:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i32 [[R]]
+;
%z = and i32 %x, %y
%s = select i1 %cond, i32 %y, i32 %z
%r = and i32 %x, %s
ret i32 %r
-; CHECK-LABEL: @test41(
-; CHECK-NEXT: and i32 %x, %y
-; CHECK-NEXT: ret i32
}
define i32 @test42(i32 %x, i32 %y) {
+; CHECK-LABEL: @test42(
+; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[X:%.*]], 0
+; CHECK-NEXT: [[B:%.*]] = sext i1 [[COND]] to i32
+; CHECK-NEXT: [[C:%.*]] = add i32 [[B]], [[Y:%.*]]
+; CHECK-NEXT: ret i32 [[C]]
+;
%b = add i32 %y, -1
%cond = icmp eq i32 %x, 0
%c = select i1 %cond, i32 %b, i32 %y
ret i32 %c
-; CHECK-LABEL: @test42(
-; CHECK-NEXT: %cond = icmp eq i32 %x, 0
-; CHECK-NEXT: %b = sext i1 %cond to i32
-; CHECK-NEXT: %c = add i32 %b, %y
-; CHECK-NEXT: ret i32 %c
}
define <2 x i32> @test42vec(<2 x i32> %x, <2 x i32> %y) {
@@ -834,8 +913,11 @@ define <2 x i32> @test42vec(<2 x i32> %x
; change the number of vector elements. This used to assert.
define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
; CHECK-LABEL: @test51(
+; CHECK-NEXT: [[SELECT:%.*]] = select <3 x i1> [[ICMP:%.*]], <3 x i16> zeroinitializer, <3 x i16> [[TMP:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <3 x i16> [[SELECT]] to i48
+; CHECK-NEXT: ret i48 [[TMP2]]
+;
%select = select <3 x i1> %icmp, <3 x i16> zeroinitializer, <3 x i16> %tmp
-; CHECK: select <3 x i1>
%tmp2 = bitcast <3 x i16> %select to i48
ret i48 %tmp2
}
@@ -845,12 +927,12 @@ define i48 @test51(<3 x i1> %icmp, <3 x
define void @min_max_bitcast(<4 x float> %a, <4 x float> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) {
; CHECK-LABEL: @min_max_bitcast(
-; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %a, %b
-; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %a, <4 x float> %b
-; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> %b, <4 x float> %a
-; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* %ptr1 to <4 x float>*
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[SEL1_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[A]], <4 x float> [[B]]
+; CHECK-NEXT: [[SEL2_V:%.*]] = select <4 x i1> [[CMP]], <4 x float> [[B]], <4 x float> [[A]]
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32>* [[PTR1:%.*]] to <4 x float>*
; CHECK-NEXT: store <4 x float> [[SEL1_V]], <4 x float>* [[TMP1]], align 16
-; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* %ptr2 to <4 x float>*
+; CHECK-NEXT: [[TMP2:%.*]] = bitcast <4 x i32>* [[PTR2:%.*]] to <4 x float>*
; CHECK-NEXT: store <4 x float> [[SEL2_V]], <4 x float>* [[TMP2]], align 16
; CHECK-NEXT: ret void
;
@@ -868,13 +950,13 @@ define void @min_max_bitcast(<4 x float>
define void @truncs_before_selects(<4 x float> %f1, <4 x float> %f2, <4 x i64> %a, <4 x i64> %b, <4 x i32>* %ptr1, <4 x i32>* %ptr2) {
; CHECK-LABEL: @truncs_before_selects(
-; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> %f1, %f2
-; CHECK-NEXT: [[BC1:%.*]] = trunc <4 x i64> %a to <4 x i32>
-; CHECK-NEXT: [[BC2:%.*]] = trunc <4 x i64> %b to <4 x i32>
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt <4 x float> [[F1:%.*]], [[F2:%.*]]
+; CHECK-NEXT: [[BC1:%.*]] = trunc <4 x i64> [[A:%.*]] to <4 x i32>
+; CHECK-NEXT: [[BC2:%.*]] = trunc <4 x i64> [[B:%.*]] to <4 x i32>
; CHECK-NEXT: [[SEL1:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC1]], <4 x i32> [[BC2]]
; CHECK-NEXT: [[SEL2:%.*]] = select <4 x i1> [[CMP]], <4 x i32> [[BC2]], <4 x i32> [[BC1]]
-; CHECK-NEXT: store <4 x i32> [[SEL1]], <4 x i32>* %ptr1, align 16
-; CHECK-NEXT: store <4 x i32> [[SEL2]], <4 x i32>* %ptr2, align 16
+; CHECK-NEXT: store <4 x i32> [[SEL1]], <4 x i32>* [[PTR1:%.*]], align 16
+; CHECK-NEXT: store <4 x i32> [[SEL2]], <4 x i32>* [[PTR2:%.*]], align 16
; CHECK-NEXT: ret void
;
%cmp = fcmp olt <4 x float> %f1, %f2
@@ -891,7 +973,7 @@ define void @truncs_before_selects(<4 x
define i32 @test52(i32 %n, i32 %m) {
; CHECK-LABEL: @test52(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %n, %m
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N:%.*]], [[M:%.*]]
; CHECK-NEXT: [[STOREMERGE:%.*]] = select i1 [[CMP]], i32 1, i32 6
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
@@ -906,8 +988,8 @@ define i32 @test52(i32 %n, i32 %m) {
define i32 @test53(i32 %x) {
; CHECK-LABEL: @test53(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 2
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], %x
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 2
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], [[X]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[SEL]]
;
@@ -919,7 +1001,7 @@ define i32 @test53(i32 %x) {
define i32 @test54(i32 %X, i32 %Y) {
; CHECK-LABEL: @test54(
-; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %X, 0
+; CHECK-NEXT: [[B:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: [[C:%.*]] = zext i1 [[B]] to i32
; CHECK-NEXT: ret i32 [[C]]
;
@@ -931,7 +1013,7 @@ define i32 @test54(i32 %X, i32 %Y) {
define i1 @test55(i1 %X, i32 %Y, i32 %Z) {
; CHECK-LABEL: @test55(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i32 %Y, 0
+; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[Y:%.*]], 0
; CHECK-NEXT: ret i1 [[C]]
;
%A = ashr exact i32 %Y, %Z
@@ -942,7 +1024,7 @@ define i1 @test55(i1 %X, i32 %Y, i32 %Z)
define i32 @test56(i16 %x) {
; CHECK-LABEL: @test56(
-; CHECK-NEXT: [[CONV:%.*]] = zext i16 %x to i32
+; CHECK-NEXT: [[CONV:%.*]] = zext i16 [[X:%.*]] to i32
; CHECK-NEXT: ret i32 [[CONV]]
;
%tobool = icmp eq i16 %x, 0
@@ -953,7 +1035,7 @@ define i32 @test56(i16 %x) {
define i32 @test57(i32 %x, i32 %y) {
; CHECK-LABEL: @test57(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, %y
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i32 [[AND]]
;
%and = and i32 %x, %y
@@ -964,7 +1046,7 @@ define i32 @test57(i32 %x, i32 %y) {
define i32 @test58(i16 %x) {
; CHECK-LABEL: @test58(
-; CHECK-NEXT: [[CONV:%.*]] = zext i16 %x to i32
+; CHECK-NEXT: [[CONV:%.*]] = zext i16 [[X:%.*]] to i32
; CHECK-NEXT: ret i32 [[CONV]]
;
%tobool = icmp ne i16 %x, 1
@@ -975,7 +1057,7 @@ define i32 @test58(i16 %x) {
define i32 @test59(i32 %x, i32 %y) {
; CHECK-LABEL: @test59(
-; CHECK-NEXT: [[AND:%.*]] = and i32 %x, %y
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i32 [[AND]]
;
%and = and i32 %x, %y
@@ -986,9 +1068,9 @@ define i32 @test59(i32 %x, i32 %y) {
define i1 @test60(i32 %x, i1* %y) {
; CHECK-LABEL: @test60(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 0
-; CHECK-NEXT: [[LOAD:%.*]] = load i1, i1* %y, align 1
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 %x, 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 0
+; CHECK-NEXT: [[LOAD:%.*]] = load i1, i1* [[Y:%.*]], align 1
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X]], 1
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i1 [[LOAD]], i1 [[CMP1]]
; CHECK-NEXT: ret i1 [[SEL]]
;
@@ -1012,6 +1094,20 @@ define i32 @test61(i32* %ptr) {
; PR14131
define void @test64(i32 %p, i16 %b) noreturn {
+; CHECK-LABEL: @test64(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br i1 undef, label [[LOR_RHS:%.*]], label [[LOR_END:%.*]]
+; CHECK: lor.rhs:
+; CHECK-NEXT: br label [[LOR_END]]
+; CHECK: lor.end:
+; CHECK-NEXT: br i1 true, label [[COND_END17:%.*]], label [[COND_FALSE16:%.*]]
+; CHECK: cond.false16:
+; CHECK-NEXT: br label [[COND_END17]]
+; CHECK: cond.end17:
+; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
+; CHECK: while.body:
+; CHECK-NEXT: br label [[WHILE_BODY]]
+;
entry:
%p.addr.0.insert.mask = and i32 %p, -65536
%conv2 = and i32 %p, 65535
@@ -1040,21 +1136,20 @@ cond.end17:
while.body:
br label %while.body
-; CHECK-LABEL: @test64(
-; CHECK-NOT: select
}
@under_aligned = external global i32, align 1
-define i32 @test76(i1 %flag, i32* %x) {
; The load here must not be speculated around the select. One side of the
; select is trivially dereferenceable but may have a lower alignment than the
; load does.
+define i32 @test76(i1 %flag, i32* %x) {
; CHECK-LABEL: @test76(
-; CHECK: store i32 0, i32* %x
-; CHECK: %[[P:.*]] = select i1 %flag, i32* @under_aligned, i32* %x
-; CHECK: load i32, i32* %[[P]]
-
+; CHECK-NEXT: store i32 0, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], i32* @under_aligned, i32* [[X]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
store i32 0, i32* %x
%p = select i1 %flag, i32* @under_aligned, i32* %x
%v = load i32, i32* %p
@@ -1063,17 +1158,19 @@ define i32 @test76(i1 %flag, i32* %x) {
declare void @scribble_on_i32(i32*)
-define i32 @test77(i1 %flag, i32* %x) {
; The load here must not be speculated around the select. One side of the
; select is trivially dereferenceable but may have a lower alignment than the
; load does.
-; CHECK-LABEL: @test77(
-; CHECK: %[[A:.*]] = alloca i32, align 1
-; CHECK: call void @scribble_on_i32(i32* nonnull %[[A]])
-; CHECK: store i32 0, i32* %x
-; CHECK: %[[P:.*]] = select i1 %flag, i32* %[[A]], i32* %x
-; CHECK: load i32, i32* %[[P]]
+define i32 @test77(i1 %flag, i32* %x) {
+; CHECK-LABEL: @test77(
+; CHECK-NEXT: [[UNDER_ALIGNED:%.*]] = alloca i32, align 1
+; CHECK-NEXT: call void @scribble_on_i32(i32* nonnull [[UNDER_ALIGNED]])
+; CHECK-NEXT: store i32 0, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], i32* [[UNDER_ALIGNED]], i32* [[X]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
%under_aligned = alloca i32, align 1
call void @scribble_on_i32(i32* %under_aligned)
store i32 0, i32* %x
@@ -1086,10 +1183,15 @@ define i32 @test78(i1 %flag, i32* %x, i3
; Test that we can speculate the loads around the select even when we can't
; fold the load completely away.
; CHECK-LABEL: @test78(
-; CHECK: %[[V1:.*]] = load i32, i32* %x
-; CHECK-NEXT: %[[V2:.*]] = load i32, i32* %y
-; CHECK-NEXT: %[[S:.*]] = select i1 %flag, i32 %[[V1]], i32 %[[V2]]
-; CHECK-NEXT: ret i32 %[[S]]
+; CHECK-NEXT: entry:
+; CHECK-NEXT: store i32 0, i32* [[X:%.*]], align 4
+; CHECK-NEXT: store i32 0, i32* [[Y:%.*]], align 4
+; CHECK-NEXT: store i32 42, i32* [[Z:%.*]], align 4
+; CHECK-NEXT: [[X_VAL:%.*]] = load i32, i32* [[X]], align 4
+; CHECK-NEXT: [[Y_VAL:%.*]] = load i32, i32* [[Y]], align 4
+; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i32 [[X_VAL]], i32 [[Y_VAL]]
+; CHECK-NEXT: ret i32 [[V]]
+;
entry:
store i32 0, i32* %x
store i32 0, i32* %y
@@ -1100,28 +1202,31 @@ entry:
ret i32 %v
}
-define i32 @test78_deref(i1 %flag, i32* dereferenceable(4) %x, i32* dereferenceable(4) %y, i32* %z) {
; Test that we can speculate the loads around the select even when we can't
; fold the load completely away.
+define i32 @test78_deref(i1 %flag, i32* dereferenceable(4) %x, i32* dereferenceable(4) %y, i32* %z) {
; CHECK-LABEL: @test78_deref(
-; CHECK: %[[V1:.*]] = load i32, i32* %x
-; CHECK-NEXT: %[[V2:.*]] = load i32, i32* %y
-; CHECK-NEXT: %[[S:.*]] = select i1 %flag, i32 %[[V1]], i32 %[[V2]]
-; CHECK-NEXT: ret i32 %[[S]]
-entry:
+; CHECK-NEXT: [[X_VAL:%.*]] = load i32, i32* [[X:%.*]], align 4
+; CHECK-NEXT: [[Y_VAL:%.*]] = load i32, i32* [[Y:%.*]], align 4
+; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i32 [[X_VAL]], i32 [[Y_VAL]]
+; CHECK-NEXT: ret i32 [[V]]
+;
%p = select i1 %flag, i32* %x, i32* %y
%v = load i32, i32* %p
ret i32 %v
}
-define i32 @test78_neg(i1 %flag, i32* %x, i32* %y, i32* %z) {
; The same as @test78 but we can't speculate the load because it can trap
; if under-aligned.
+define i32 @test78_neg(i1 %flag, i32* %x, i32* %y, i32* %z) {
; CHECK-LABEL: @test78_neg(
-; CHECK: %p = select i1 %flag, i32* %x, i32* %y
-; CHECK-NEXT: %v = load i32, i32* %p, align 16
-; CHECK-NEXT: ret i32 %v
-entry:
+; CHECK-NEXT: store i32 0, i32* [[X:%.*]], align 4
+; CHECK-NEXT: store i32 0, i32* [[Y:%.*]], align 4
+; CHECK-NEXT: store i32 42, i32* [[Z:%.*]], align 4
+; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], i32* [[X]], i32* [[Y]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 16
+; CHECK-NEXT: ret i32 [[V]]
+;
store i32 0, i32* %x
store i32 0, i32* %y
; Block forwarding by storing to %z which could alias either %x or %y.
@@ -1131,28 +1236,33 @@ entry:
ret i32 %v
}
-define i32 @test78_deref_neg(i1 %flag, i32* dereferenceable(2) %x, i32* dereferenceable(4) %y, i32* %z) {
; The same as @test78_deref but we can't speculate the load because
; one of the arguments is not sufficiently dereferenceable.
+define i32 @test78_deref_neg(i1 %flag, i32* dereferenceable(2) %x, i32* dereferenceable(4) %y, i32* %z) {
; CHECK-LABEL: @test78_deref_neg(
-; CHECK: %p = select i1 %flag, i32* %x, i32* %y
-; CHECK-NEXT: %v = load i32, i32* %p
-; CHECK-NEXT: ret i32 %v
-entry:
+; CHECK-NEXT: [[P:%.*]] = select i1 [[FLAG:%.*]], i32* [[X:%.*]], i32* [[Y:%.*]]
+; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
%p = select i1 %flag, i32* %x, i32* %y
%v = load i32, i32* %p
ret i32 %v
}
-define float @test79(i1 %flag, float* %x, i32* %y, i32* %z) {
; Test that we can speculate the loads around the select even when we can't
; fold the load completely away.
+define float @test79(i1 %flag, float* %x, i32* %y, i32* %z) {
; CHECK-LABEL: @test79(
-; CHECK: %[[V1:.*]] = load float, float* %x
-; CHECK-NEXT: %[[V2:.*]] = load float, float* %y
-; CHECK-NEXT: %[[S:.*]] = select i1 %flag, float %[[V1]], float %[[V2]]
-; CHECK-NEXT: ret float %[[S]]
-entry:
+; CHECK-NEXT: [[X1:%.*]] = bitcast float* [[X:%.*]] to i32*
+; CHECK-NEXT: [[Y1:%.*]] = bitcast i32* [[Y:%.*]] to float*
+; CHECK-NEXT: store i32 0, i32* [[X1]], align 4
+; CHECK-NEXT: store i32 0, i32* [[Y]], align 4
+; CHECK-NEXT: store i32 42, i32* [[Z:%.*]], align 4
+; CHECK-NEXT: [[X_VAL:%.*]] = load float, float* [[X]], align 4
+; CHECK-NEXT: [[Y1_VAL:%.*]] = load float, float* [[Y1]], align 4
+; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], float [[X_VAL]], float [[Y1_VAL]]
+; CHECK-NEXT: ret float [[V]]
+;
%x1 = bitcast float* %x to i32*
%y1 = bitcast i32* %y to float*
store i32 0, i32* %x1
@@ -1164,16 +1274,18 @@ entry:
ret float %v
}
-define i32 @test80(i1 %flag) {
; Test that when we speculate the loads around the select they fold throug
; load->load folding and load->store folding.
+define i32 @test80(i1 %flag) {
; CHECK-LABEL: @test80(
-; CHECK: %[[X:.*]] = alloca i32
-; CHECK-NEXT: %[[Y:.*]] = alloca i32
-; CHECK: %[[V:.*]] = load i32, i32* %[[X]]
-; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]]
-; CHECK-NEXT: ret i32 %[[V]]
-entry:
+; CHECK-NEXT: [[X:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[Y:%.*]] = alloca i32, align 4
+; CHECK-NEXT: call void @scribble_on_i32(i32* nonnull [[X]])
+; CHECK-NEXT: call void @scribble_on_i32(i32* nonnull [[Y]])
+; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[X]], align 4
+; CHECK-NEXT: store i32 [[TMP]], i32* [[Y]], align 4
+; CHECK-NEXT: ret i32 [[TMP]]
+;
%x = alloca i32
%y = alloca i32
call void @scribble_on_i32(i32* %x)
@@ -1185,17 +1297,19 @@ entry:
ret i32 %v
}
-define float @test81(i1 %flag) {
; Test that we can speculate the load around the select even though they use
; differently typed pointers.
+define float @test81(i1 %flag) {
; CHECK-LABEL: @test81(
-; CHECK: %[[X:.*]] = alloca i32
-; CHECK-NEXT: %[[Y:.*]] = alloca i32
-; CHECK: %[[V:.*]] = load i32, i32* %[[X]]
-; CHECK-NEXT: store i32 %[[V]], i32* %[[Y]]
-; CHECK-NEXT: %[[C:.*]] = bitcast i32 %[[V]] to float
-; CHECK-NEXT: ret float %[[C]]
-entry:
+; CHECK-NEXT: [[X:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[Y:%.*]] = alloca i32, align 4
+; CHECK-NEXT: call void @scribble_on_i32(i32* nonnull [[X]])
+; CHECK-NEXT: call void @scribble_on_i32(i32* nonnull [[Y]])
+; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[X]], align 4
+; CHECK-NEXT: store i32 [[TMP]], i32* [[Y]], align 4
+; CHECK-NEXT: [[V:%.*]] = bitcast i32 [[TMP]] to float
+; CHECK-NEXT: ret float [[V]]
+;
%x = alloca float
%y = alloca i32
%x1 = bitcast float* %x to i32*
@@ -1209,19 +1323,21 @@ entry:
ret float %v
}
-define i32 @test82(i1 %flag) {
; Test that we can speculate the load around the select even though they use
; differently typed pointers.
+define i32 @test82(i1 %flag) {
; CHECK-LABEL: @test82(
-; CHECK: %[[X:.*]] = alloca float
-; CHECK-NEXT: %[[Y:.*]] = alloca i32
-; CHECK-NEXT: %[[X1:.*]] = bitcast float* %[[X]] to i32*
-; CHECK-NEXT: %[[Y1:.*]] = bitcast i32* %[[Y]] to float*
-; CHECK: %[[V:.*]] = load float, float* %[[X]]
-; CHECK-NEXT: store float %[[V]], float* %[[Y1]]
-; CHECK-NEXT: %[[C:.*]] = bitcast float %[[V]] to i32
-; CHECK-NEXT: ret i32 %[[C]]
-entry:
+; CHECK-NEXT: [[X:%.*]] = alloca float, align 4
+; CHECK-NEXT: [[Y:%.*]] = alloca i32, align 4
+; CHECK-NEXT: [[X1:%.*]] = bitcast float* [[X]] to i32*
+; CHECK-NEXT: [[Y1:%.*]] = bitcast i32* [[Y]] to float*
+; CHECK-NEXT: call void @scribble_on_i32(i32* [[X1]])
+; CHECK-NEXT: call void @scribble_on_i32(i32* nonnull [[Y]])
+; CHECK-NEXT: [[TMP:%.*]] = load float, float* [[X]], align 4
+; CHECK-NEXT: store float [[TMP]], float* [[Y1]], align 4
+; CHECK-NEXT: [[V:%.*]] = bitcast float [[TMP]] to i32
+; CHECK-NEXT: ret i32 [[V]]
+;
%x = alloca float
%y = alloca i32
%x1 = bitcast float* %x to i32*
@@ -1238,19 +1354,21 @@ entry:
declare void @scribble_on_i64(i64*)
declare void @scribble_on_i128(i128*)
-define i8* @test83(i1 %flag) {
; Test that we can speculate the load around the select even though they use
; differently typed pointers and requires inttoptr casts.
+define i8* @test83(i1 %flag) {
; CHECK-LABEL: @test83(
-; CHECK: %[[X:.*]] = alloca i8*
-; CHECK-NEXT: %[[Y:.*]] = alloca i8*
-; CHECK-DAG: %[[X2:.*]] = bitcast i8** %[[X]] to i64*
-; CHECK-DAG: %[[Y2:.*]] = bitcast i8** %[[Y]] to i64*
-; CHECK: %[[V:.*]] = load i64, i64* %[[X2]]
-; CHECK-NEXT: store i64 %[[V]], i64* %[[Y2]]
-; CHECK-NEXT: %[[C:.*]] = inttoptr i64 %[[V]] to i8*
-; CHECK-NEXT: ret i8* %[[C]]
-entry:
+; CHECK-NEXT: [[X:%.*]] = alloca i8*, align 8
+; CHECK-NEXT: [[Y:%.*]] = alloca i8*, align 8
+; CHECK-NEXT: [[TMPCAST:%.*]] = bitcast i8** [[Y]] to i64*
+; CHECK-NEXT: [[X1:%.*]] = bitcast i8** [[X]] to i64*
+; CHECK-NEXT: call void @scribble_on_i64(i64* [[X1]])
+; CHECK-NEXT: call void @scribble_on_i64(i64* [[TMPCAST]])
+; CHECK-NEXT: [[TMP:%.*]] = load i64, i64* [[X1]], align 8
+; CHECK-NEXT: store i64 [[TMP]], i64* [[TMPCAST]], align 8
+; CHECK-NEXT: [[V:%.*]] = inttoptr i64 [[TMP]] to i8*
+; CHECK-NEXT: ret i8* [[V]]
+;
%x = alloca i8*
%y = alloca i64
%x1 = bitcast i8** %x to i64*
@@ -1264,17 +1382,21 @@ entry:
ret i8* %v
}
-define i64 @test84(i1 %flag) {
; Test that we can speculate the load around the select even though they use
; differently typed pointers and requires a ptrtoint cast.
+define i64 @test84(i1 %flag) {
; CHECK-LABEL: @test84(
-; CHECK: %[[X:.*]] = alloca i8*
-; CHECK-NEXT: %[[Y:.*]] = alloca i8*
-; CHECK: %[[V:.*]] = load i8*, i8** %[[X]]
-; CHECK-NEXT: store i8* %[[V]], i8** %[[Y]]
-; CHECK-NEXT: %[[C:.*]] = ptrtoint i8* %[[V]] to i64
-; CHECK-NEXT: ret i64 %[[C]]
-entry:
+; CHECK-NEXT: [[X:%.*]] = alloca i8*, align 8
+; CHECK-NEXT: [[Y:%.*]] = alloca i8*, align 8
+; CHECK-NEXT: [[TMPCAST:%.*]] = bitcast i8** [[Y]] to i64*
+; CHECK-NEXT: [[X1:%.*]] = bitcast i8** [[X]] to i64*
+; CHECK-NEXT: call void @scribble_on_i64(i64* [[X1]])
+; CHECK-NEXT: call void @scribble_on_i64(i64* [[TMPCAST]])
+; CHECK-NEXT: [[TMP:%.*]] = load i8*, i8** [[X]], align 8
+; CHECK-NEXT: store i8* [[TMP]], i8** [[Y]], align 8
+; CHECK-NEXT: [[V:%.*]] = ptrtoint i8* [[TMP]] to i64
+; CHECK-NEXT: ret i64 [[V]]
+;
%x = alloca i8*
%y = alloca i64
%x1 = bitcast i8** %x to i64*
@@ -1288,18 +1410,25 @@ entry:
ret i64 %v
}
-define i8* @test85(i1 %flag) {
; Test that we can't speculate the load around the select. The load of the
; pointer doesn't load all of the stored integer bits. We could fix this, but it
; would require endianness checks and other nastiness.
+define i8* @test85(i1 %flag) {
; CHECK-LABEL: @test85(
-; CHECK: %[[T:.*]] = load i128, i128*
-; CHECK-NEXT: store i128 %[[T]], i128*
-; CHECK-NEXT: %[[X:.*]] = load i8*, i8**
-; CHECK-NEXT: %[[Y:.*]] = load i8*, i8**
-; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i8* %[[X]], i8* %[[Y]]
-; CHECK-NEXT: ret i8* %[[V]]
-entry:
+; CHECK-NEXT: [[X1:%.*]] = alloca [2 x i8*], align 8
+; CHECK-NEXT: [[Y:%.*]] = alloca i128, align 8
+; CHECK-NEXT: [[X1_SUB:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[X1]], i64 0, i64 0
+; CHECK-NEXT: [[X2:%.*]] = bitcast [2 x i8*]* [[X1]] to i128*
+; CHECK-NEXT: [[Y1:%.*]] = bitcast i128* [[Y]] to i8**
+; CHECK-NEXT: call void @scribble_on_i128(i128* [[X2]])
+; CHECK-NEXT: call void @scribble_on_i128(i128* nonnull [[Y]])
+; CHECK-NEXT: [[TMP:%.*]] = load i128, i128* [[X2]], align 8
+; CHECK-NEXT: store i128 [[TMP]], i128* [[Y]], align 8
+; CHECK-NEXT: [[X1_SUB_VAL:%.*]] = load i8*, i8** [[X1_SUB]], align 8
+; CHECK-NEXT: [[Y1_VAL:%.*]] = load i8*, i8** [[Y1]], align 8
+; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i8* [[X1_SUB_VAL]], i8* [[Y1_VAL]]
+; CHECK-NEXT: ret i8* [[V]]
+;
%x = alloca [2 x i8*]
%y = alloca i128
%x1 = bitcast [2 x i8*]* %x to i8**
@@ -1314,19 +1443,25 @@ entry:
ret i8* %v
}
-define i128 @test86(i1 %flag) {
; Test that we can't speculate the load around the select when the integer size
; is larger than the pointer size. The store of the pointer doesn't store to all
; the bits of the integer.
-;
+define i128 @test86(i1 %flag) {
; CHECK-LABEL: @test86(
-; CHECK: %[[T:.*]] = load i8*, i8**
-; CHECK-NEXT: store i8* %[[T]], i8**
-; CHECK-NEXT: %[[X:.*]] = load i128, i128*
-; CHECK-NEXT: %[[Y:.*]] = load i128, i128*
-; CHECK-NEXT: %[[V:.*]] = select i1 %flag, i128 %[[X]], i128 %[[Y]]
-; CHECK-NEXT: ret i128 %[[V]]
-entry:
+; CHECK-NEXT: [[X1:%.*]] = alloca [2 x i8*], align 8
+; CHECK-NEXT: [[Y:%.*]] = alloca i128, align 8
+; CHECK-NEXT: [[X1_SUB:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[X1]], i64 0, i64 0
+; CHECK-NEXT: [[X2:%.*]] = bitcast [2 x i8*]* [[X1]] to i128*
+; CHECK-NEXT: [[Y1:%.*]] = bitcast i128* [[Y]] to i8**
+; CHECK-NEXT: call void @scribble_on_i128(i128* [[X2]])
+; CHECK-NEXT: call void @scribble_on_i128(i128* nonnull [[Y]])
+; CHECK-NEXT: [[TMP:%.*]] = load i8*, i8** [[X1_SUB]], align 8
+; CHECK-NEXT: store i8* [[TMP]], i8** [[Y1]], align 8
+; CHECK-NEXT: [[X2_VAL:%.*]] = load i128, i128* [[X2]], align 8
+; CHECK-NEXT: [[Y_VAL:%.*]] = load i128, i128* [[Y]], align 8
+; CHECK-NEXT: [[V:%.*]] = select i1 [[FLAG:%.*]], i128 [[X2_VAL]], i128 [[Y_VAL]]
+; CHECK-NEXT: ret i128 [[V]]
+;
%x = alloca [2 x i8*]
%y = alloca i128
%x1 = bitcast [2 x i8*]* %x to i8**
@@ -1343,10 +1478,10 @@ entry:
define i32 @test_select_select0(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) {
; CHECK-LABEL: @test_select_select0(
-; CHECK-NEXT: [[C0:%.*]] = icmp slt i32 %a, %v1
-; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0]], i32 %r1, i32 %r0
-; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 %a, %v2
-; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], i32 [[S0]], i32 %r1
+; CHECK-NEXT: [[C0:%.*]] = icmp slt i32 [[A:%.*]], [[V1:%.*]]
+; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0]], i32 [[R1:%.*]], i32 [[R0:%.*]]
+; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[A]], [[V2:%.*]]
+; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], i32 [[S0]], i32 [[R1]]
; CHECK-NEXT: ret i32 [[S1]]
;
%c0 = icmp sge i32 %a, %v1
@@ -1358,10 +1493,10 @@ define i32 @test_select_select0(i32 %a,
define i32 @test_select_select1(i32 %a, i32 %r0, i32 %r1, i32 %v1, i32 %v2) {
; CHECK-LABEL: @test_select_select1(
-; CHECK-NEXT: [[C0:%.*]] = icmp slt i32 %a, %v1
-; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0]], i32 %r1, i32 %r0
-; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 %a, %v2
-; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], i32 %r0, i32 [[S0]]
+; CHECK-NEXT: [[C0:%.*]] = icmp slt i32 [[A:%.*]], [[V1:%.*]]
+; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0]], i32 [[R1:%.*]], i32 [[R0:%.*]]
+; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[A]], [[V2:%.*]]
+; CHECK-NEXT: [[S1:%.*]] = select i1 [[C1]], i32 [[R0]], i32 [[S0]]
; CHECK-NEXT: ret i32 [[S1]]
;
%c0 = icmp sge i32 %a, %v1
@@ -1372,11 +1507,12 @@ define i32 @test_select_select1(i32 %a,
}
define i32 @PR23757(i32 %x) {
-; CHECK-LABEL: @PR23757
-; CHECK: %[[cmp:.*]] = icmp eq i32 %x, 2147483647
-; CHECK-NEXT: %[[add:.*]] = add nsw i32 %x, 1
-; CHECK-NEXT: %[[sel:.*]] = select i1 %[[cmp]], i32 -2147483648, i32 %[[add]]
-; CHECK-NEXT: ret i32 %[[sel]]
+; CHECK-LABEL: @PR23757(
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[X:%.*]], 2147483647
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[X]], 1
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 -2147483648, i32 [[ADD]]
+; CHECK-NEXT: ret i32 [[SEL]]
+;
%cmp = icmp eq i32 %x, 2147483647
%add = add nsw i32 %x, 1
%sel = select i1 %cmp, i32 -2147483648, i32 %add
@@ -1387,10 +1523,10 @@ define i32 @PR23757(i32 %x) {
define i32 @PR27137(i32 %a) {
; CHECK-LABEL: @PR27137(
-; CHECK-NEXT: [[NOT_A:%.*]] = xor i32 %a, -1
-; CHECK-NEXT: [[C0:%.*]] = icmp sgt i32 [[NOT_A]], -1
-; CHECK-NEXT: [[S0:%.*]] = select i1 [[C0]], i32 [[NOT_A]], i32 -1
-; CHECK-NEXT: ret i32 [[S0]]
+; CHECK-NEXT: [[NOT_A:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[NOT_A]], -1
+; CHECK-NEXT: [[S1:%.*]] = select i1 [[TMP1]], i32 [[NOT_A]], i32 -1
+; CHECK-NEXT: ret i32 [[S1]]
;
%not_a = xor i32 %a, -1
%c0 = icmp slt i32 %a, 0
@@ -1402,7 +1538,7 @@ define i32 @PR27137(i32 %a) {
define i32 @select_icmp_slt0_xor(i32 %x) {
; CHECK-LABEL: @select_icmp_slt0_xor(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 %x, -2147483648
+; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[X:%.*]], -2147483648
; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp slt i32 %x, zeroinitializer
@@ -1413,7 +1549,7 @@ define i32 @select_icmp_slt0_xor(i32 %x)
define <2 x i32> @select_icmp_slt0_xor_vec(<2 x i32> %x) {
; CHECK-LABEL: @select_icmp_slt0_xor_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> %x, <i32 -2147483648, i32 -2147483648>
+; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X:%.*]], <i32 -2147483648, i32 -2147483648>
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp = icmp slt <2 x i32> %x, zeroinitializer
@@ -1424,7 +1560,7 @@ define <2 x i32> @select_icmp_slt0_xor_v
define <4 x i32> @canonicalize_to_shuffle(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @canonicalize_to_shuffle(
-; CHECK-NEXT: [[SEL:%.*]] = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 6, i32 3>
+; CHECK-NEXT: [[SEL:%.*]] = shufflevector <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> <i32 0, i32 5, i32 6, i32 3>
; CHECK-NEXT: ret <4 x i32> [[SEL]]
;
%sel = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x i32> %a, <4 x i32> %b
@@ -1437,7 +1573,7 @@ define <4 x i32> @canonicalize_to_shuffl
define <4 x i32> @undef_elts_in_condition(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @undef_elts_in_condition(
-; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> %a, <4 x i32> %b
+; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
; CHECK-NEXT: ret <4 x i32> [[SEL]]
;
%sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 undef>, <4 x i32> %a, <4 x i32> %b
@@ -1450,7 +1586,7 @@ define <4 x i32> @undef_elts_in_conditio
define <4 x i32> @cannot_canonicalize_to_shuffle1(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @cannot_canonicalize_to_shuffle1(
-; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> bitcast (i4 ptrtoint (i32* @g to i4) to <4 x i1>), <4 x i32> %a, <4 x i32> %b
+; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> bitcast (i4 ptrtoint (i32* @g to i4) to <4 x i1>), <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
; CHECK-NEXT: ret <4 x i32> [[SEL]]
;
%sel = select <4 x i1> bitcast (i4 ptrtoint (i32* @g to i4) to <4 x i1>), <4 x i32> %a, <4 x i32> %b
@@ -1459,7 +1595,7 @@ define <4 x i32> @cannot_canonicalize_to
define <4 x i32> @cannot_canonicalize_to_shuffle2(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @cannot_canonicalize_to_shuffle2(
-; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 icmp sle (i16 ptrtoint (i32* @g to i16), i16 4)>, <4 x i32> %a, <4 x i32> %b
+; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> <i1 true, i1 undef, i1 false, i1 icmp sle (i16 ptrtoint (i32* @g to i16), i16 4)>, <4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]]
; CHECK-NEXT: ret <4 x i32> [[SEL]]
;
%sel = select <4 x i1> <i1 true, i1 undef, i1 false, i1 icmp sle (i16 ptrtoint (i32* @g to i16), i16 4)>, <4 x i32> %a, <4 x i32> %b
@@ -1470,8 +1606,8 @@ declare void @llvm.assume(i1)
define i8 @assume_cond_true(i1 %cond, i8 %x, i8 %y) {
; CHECK-LABEL: @assume_cond_true(
-; CHECK-NEXT: call void @llvm.assume(i1 %cond)
-; CHECK-NEXT: ret i8 %x
+; CHECK-NEXT: call void @llvm.assume(i1 [[COND:%.*]])
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
call void @llvm.assume(i1 %cond)
%sel = select i1 %cond, i8 %x, i8 %y
@@ -1482,9 +1618,9 @@ define i8 @assume_cond_true(i1 %cond, i8
define i8 @assume_cond_false(i1 %cond, i8 %x, i8 %y) {
; CHECK-LABEL: @assume_cond_false(
-; CHECK-NEXT: [[NOTCOND:%.*]] = xor i1 %cond, true
+; CHECK-NEXT: [[NOTCOND:%.*]] = xor i1 [[COND:%.*]], true
; CHECK-NEXT: call void @llvm.assume(i1 [[NOTCOND]])
-; CHECK-NEXT: ret i8 %y
+; CHECK-NEXT: ret i8 [[Y:%.*]]
;
%notcond = xor i1 %cond, true
call void @llvm.assume(i1 %notcond)
@@ -1494,6 +1630,12 @@ define i8 @assume_cond_false(i1 %cond, i
; Test case to make sure we don't consider an all ones float values for converting the select into a sext.
define <4 x float> @PR33721(<4 x float> %w) {
+; CHECK-LABEL: @PR33721(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = fcmp ole <4 x float> [[W:%.*]], zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[TMP0]], <4 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <4 x float> zeroinitializer
+; CHECK-NEXT: ret <4 x float> [[TMP1]]
+;
entry:
%0 = fcmp ole <4 x float> %w, zeroinitializer
%1 = select <4 x i1> %0, <4 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <4 x float> zeroinitializer
@@ -1551,3 +1693,4 @@ define i8 @test90(i1 %cond, i8 %w, i8 %x
%c = select i1 %cond, i8 %z, i8 %b
ret i8 %c
}
+
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