[PATCH] D45572: [X86] Replace action Promote with Custom for operation ISD::SINT_TO_FP
Alexander Ivchenko via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 24 06:01:26 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL330711: [X86] Replace action Promote with Expand for operation ISD::SINT_TO_FP (authored by aivchenk, committed by ).
Repository:
rL LLVM
https://reviews.llvm.org/D45572
Files:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/sitofp.ll
Index: llvm/trunk/test/CodeGen/X86/sitofp.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/sitofp.ll
+++ llvm/trunk/test/CodeGen/X86/sitofp.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s | FileCheck %s
+
+target triple = "i386-unknown-linux-gnu"
+
+define double @foo(i16 %a) #0 {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0:
+; CHECK-NEXT: subl $12, %esp
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT: movl %eax, (%esp)
+; CHECK-NEXT: calll __floatsidf
+; CHECK-NEXT: addl $12, %esp
+; CHECK-NEXT: retl
+ %conv = zext i16 %a to i32
+ %conv1 = sitofp i32 %conv to double
+ ret double %conv1
+}
+
+attributes #0 = { "use-soft-float"="true" }
Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -216,6 +216,8 @@
// We have an algorithm for SSE2, and we turn this into a 64-bit
// FILD or VCVTUSI2SS/SD for other targets.
setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom);
+ } else {
+ setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Expand);
}
// Promote i1/i8 SINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have
@@ -235,7 +237,7 @@
}
} else {
setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote);
- setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Promote);
+ setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Expand);
}
// Promote i1/i8 FP_TO_SINT to larger FP_TO_SINTS's, as X86 doesn't have
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