[llvm] r330711 - [X86] Replace action Promote with Expand for operation ISD::SINT_TO_FP

[Alexander Ivchenko via llvm-commits]

Author: aivchenk
Date: Tue Apr 24 05:57:51 2018
New Revision: 330711

URL: http://llvm.org/viewvc/llvm-project?rev=330711&view=rev
Log:
[X86] Replace action Promote with Expand for operation ISD::SINT_TO_FP

Summary:
If attribute "use-soft-float"="true" is set then X86ISelLowering.cpp sets
'Promote' action for ISD::SINT_TO_FP operation on type i32.

But 'Promote' action is not proper in this case since lib function
__floatsidf is available for casting from signed int to float type.
Thus Expand action is more suitable here.

The Expand action should be set for ISD::UINT_TO_FP for soft float as well.

If function attribute "use-soft-float"="true" is set then infinite looping
can happen in DAG combining, function visitSINT_TO_FP() replaces SINT_TO_FP
node with UINT_TO_FP node and function combineUIntToFP() replace vice versa in cycle.
The fix prevents it.

Patch by vrybalov

Differential Revision: https://reviews.llvm.org/D45572

Added:
    llvm/trunk/test/CodeGen/X86/sitofp.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=330711&r1=330710&r2=330711&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Apr 24 05:57:51 2018
@@ -216,6 +216,8 @@ X86TargetLowering::X86TargetLowering(con
     // We have an algorithm for SSE2, and we turn this into a 64-bit
     // FILD or VCVTUSI2SS/SD for other targets.
     setOperationAction(ISD::UINT_TO_FP     , MVT::i32  , Custom);
+  } else {
+    setOperationAction(ISD::UINT_TO_FP     , MVT::i32  , Expand);
   }
 
   // Promote i1/i8 SINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have
@@ -235,7 +237,7 @@ X86TargetLowering::X86TargetLowering(con
     }
   } else {
     setOperationAction(ISD::SINT_TO_FP     , MVT::i16  , Promote);
-    setOperationAction(ISD::SINT_TO_FP     , MVT::i32  , Promote);
+    setOperationAction(ISD::SINT_TO_FP     , MVT::i32  , Expand);
   }
 
   // Promote i1/i8 FP_TO_SINT to larger FP_TO_SINTS's, as X86 doesn't have

Added: llvm/trunk/test/CodeGen/X86/sitofp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sitofp.ll?rev=330711&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sitofp.ll (added)
+++ llvm/trunk/test/CodeGen/X86/sitofp.ll Tue Apr 24 05:57:51 2018
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s | FileCheck %s
+
+target triple = "i386-unknown-linux-gnu"
+
+define double @foo(i16 %a) #0 {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    subl $12, %esp
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl %eax, (%esp)
+; CHECK-NEXT:    calll __floatsidf
+; CHECK-NEXT:    addl $12, %esp
+; CHECK-NEXT:    retl
+  %conv = zext i16 %a to i32
+  %conv1 = sitofp i32 %conv to double
+  ret double %conv1
+}
+
+attributes #0 = { "use-soft-float"="true" }