[PATCH] D45986: [AggressiveInstCombine] convert a chain of 'or-shift' bits into masked compare

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: efriedma, dmgreen, kparzysz, fhahn.
Herald added a subscriber: mcrosier.

and (or (lshr X, C), ...), 1 --> (X & C') != 0

I initially thought about implementing the minimal pattern in instcombine as mentioned here:
https://bugs.llvm.org/show_bug.cgi?id=37098#c6

...but we need to do better to catch the more general sequence from the motivating test (more than 2 bits in the compare). And a test-suite run with statistics showed that this pattern only happened 2 times currently. It would potentially happen more often if reassociation worked better (https://reviews.llvm.org/D45842), but it's probably still not too frequent?

This is small enough that I didn't see a need to create a whole new class/file within AggressiveInstCombine. There are likely other relatively small matchers like what was discussed in https://reviews.llvm.org/D44266 that would slide under foldUnusualPatterns() (name suggestions welcome). We could potentially also consolidate matchers for ctpop, bswap, etc under here.


https://reviews.llvm.org/D45986

Files:
  lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
  test/Transforms/AggressiveInstCombine/masked-cmp.ll

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