[PATCH] D45956: [AArch64][SVE] Asm: Support for gather LD1/LDFF1 (scalar + vector (packed 32bit elts, unscaled)) load instructions.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen created this revision.
sdesmalen added reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro.
Herald added a reviewer: javed.absar.
Herald added subscribers: kristof.beyls, tschuett.

Patch [6/8] in series to add support for SVE's gather load instructions
that use scalar+vector addressing modes.


https://reviews.llvm.org/D45956

Files:
  lib/Target/AArch64/AArch64SVEInstrInfo.td
  lib/Target/AArch64/SVEInstrFormats.td
  test/MC/AArch64/SVE/ld1b.s
  test/MC/AArch64/SVE/ld1d.s
  test/MC/AArch64/SVE/ld1h.s
  test/MC/AArch64/SVE/ld1sb.s
  test/MC/AArch64/SVE/ld1sh.s
  test/MC/AArch64/SVE/ld1sw.s
  test/MC/AArch64/SVE/ld1w.s
  test/MC/AArch64/SVE/ldff1b.s
  test/MC/AArch64/SVE/ldff1d.s
  test/MC/AArch64/SVE/ldff1h.s
  test/MC/AArch64/SVE/ldff1sb.s
  test/MC/AArch64/SVE/ldff1sh.s
  test/MC/AArch64/SVE/ldff1sw.s
  test/MC/AArch64/SVE/ldff1w.s

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