[llvm] r330586 - AMDGPU: Fix SDWA peephole for V_AND_B32

[Nicolai Haehnle via llvm-commits]

Author: nha
Date: Mon Apr 23 06:06:03 2018
New Revision: 330586

URL: http://llvm.org/viewvc/llvm-project?rev=330586&view=rev
Log:
AMDGPU: Fix SDWA peephole for V_AND_B32

Summary:
Found by inspection. We care about the operand that *doesn't*
contain the immediate.

I believe this is currently not hit because we fold 0xff / 0xffff
immediates only later.

Change-Id: Ic3cf8538bc7da5eff3200d96eccf9d339e6345a7

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45886

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIPeepholeSDWA.cpp?rev=330586&r1=330585&r2=330586&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIPeepholeSDWA.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIPeepholeSDWA.cpp Mon Apr 23 06:06:03 2018
@@ -699,7 +699,7 @@ SIPeepholeSDWA::matchSDWAOperand(Machine
 
     MachineOperand *Dst = TII->getNamedOperand(MI, AMDGPU::OpName::vdst);
 
-    if (TRI->isPhysicalRegister(Src1->getReg()) ||
+    if (TRI->isPhysicalRegister(ValSrc->getReg()) ||
         TRI->isPhysicalRegister(Dst->getReg()))
       break;