[llvm] r330552 - [X86] Remove unnecessary CVT instrw overrides.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 22 10:54:58 PDT 2018
Author: rksimon
Date: Sun Apr 22 10:54:58 2018
New Revision: 330552
URL: http://llvm.org/viewvc/llvm-project?rev=330552&view=rev
Log:
[X86] Remove unnecessary CVT instrw overrides.
Modified:
llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
llvm/trunk/lib/Target/X86/X86SchedHaswell.td
llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
Modified: llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedBroadwell.td?rev=330552&r1=330551&r2=330552&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedBroadwell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedBroadwell.td Sun Apr 22 10:54:58 2018
@@ -1426,8 +1426,6 @@ def: InstRW<[BWWriteResGroup91], (instre
"(V?)ADDSUBPDrm",
"(V?)ADDSUBPSrm",
"(V?)CVTDQ2PSrm",
- "(V?)CVTPS2DQrm",
- "(V?)CVTTPS2DQrm",
"(V?)SUBPDrm",
"(V?)SUBPSrm",
"(V?)SUBSDrm",
@@ -1551,7 +1549,6 @@ def: InstRW<[BWWriteResGroup101], (instr
"VADDSUBPSYrm",
"VCMPPDYrmi",
"VCMPPSYrmi",
- "VCVTDQ2PSYrm",
"VCVTPS2DQYrm",
"VCVTTPS2DQYrm",
"VMAX(C?)PDYrm",
Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=330552&r1=330551&r2=330552&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Sun Apr 22 10:54:58 2018
@@ -1493,7 +1493,6 @@ def: InstRW<[HWWriteResGroup52], (instre
"(V?)ADDPSrm",
"(V?)ADDSUBPDrm",
"(V?)ADDSUBPSrm",
- "(V?)CVTDQ2PSrm",
"(V?)CVTPS2DQrm",
"(V?)CVTTPS2DQrm",
"(V?)SUBPDrm",
Modified: llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td?rev=330552&r1=330551&r2=330552&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleZnver1.td Sun Apr 22 10:54:58 2018
@@ -1247,12 +1247,6 @@ def ZnWriteCVTPD2PSLd: SchedWriteRes<[Zn
// x,m128.
def : InstRW<[ZnWriteCVTPD2PSLd], (instregex "(V?)CVTPD2PS(X?)rm")>;
-// x,y.
-def ZnWriteCVTPD2PSYr : SchedWriteRes<[ZnFPU3]> {
- let Latency = 5;
-}
-def : InstRW<[ZnWriteCVTPD2PSYr], (instregex "(V?)CVTPD2PSYrr")>;
-
// x,m256.
def ZnWriteCVTPD2PSYLd : SchedWriteRes<[ZnAGU, ZnFPU3]> {
let Latency = 11;
@@ -1351,9 +1345,6 @@ def : InstRW<[ZnWriteCVTPS2PIr], (instre
def ZnWriteCVSTSI2SSr: SchedWriteRes<[ZnFPU3]> {
let Latency = 5;
}
-// CVSTSI2SS.
-// x,r32.
-def : InstRW<[ZnWriteCVSTSI2SSr], (instregex "(V?)CVTSI2SS(64)?rr")>;
// same as CVTPD2DQr
// CVT(T)SS2SI.
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