[llvm] r330523 - [X86] Strip unnecessary broadcast/shuffle256 instrw overrides from scheduler models.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 21 13:45:12 PDT 2018
Author: rksimon
Date: Sat Apr 21 13:45:12 2018
New Revision: 330523
URL: http://llvm.org/viewvc/llvm-project?rev=330523&view=rev
Log:
[X86] Strip unnecessary broadcast/shuffle256 instrw overrides from scheduler models.
Modified:
llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
llvm/trunk/lib/Target/X86/X86SchedHaswell.td
llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
Modified: llvm/trunk/lib/Target/X86/X86SchedBroadwell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedBroadwell.td?rev=330523&r1=330522&r2=330523&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedBroadwell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedBroadwell.td Sat Apr 21 13:45:12 2018
@@ -351,7 +351,6 @@ def BWWriteResGroup3 : SchedWriteRes<[BW
def: InstRW<[BWWriteResGroup3], (instregex "MMX_MOVD64rr",
"MMX_MOVD64to64rr",
"MMX_MOVQ2DQrr",
- "VBROADCASTSSrr",
"(V?)MOV64toPQIrr",
"(V?)MOVAPD(Y?)rr",
"(V?)MOVAPS(Y?)rr",
@@ -359,8 +358,6 @@ def: InstRW<[BWWriteResGroup3], (instreg
"(V?)MOVUPD(Y?)rr",
"(V?)MOVUPS(Y?)rr",
"(V?)PBLENDW(Y?)rri",
- "VPBROADCASTDrr",
- "VPBROADCASTQrr",
"(V?)PSLLDQ(Y?)ri",
"(V?)PSRLDQ(Y?)ri")>;
@@ -657,20 +654,8 @@ def BWWriteResGroup28 : SchedWriteRes<[B
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[BWWriteResGroup28], (instregex "VBROADCASTSDYrr",
- "VBROADCASTSSYrr",
- "VEXTRACTF128rr",
- "VEXTRACTI128rr",
- "VINSERTF128rr",
- "VINSERTI128rr",
- "VPBROADCASTB(Y?)rr",
- "VPBROADCASTDYrr",
- "VPBROADCASTQYrr",
- "VPBROADCASTW(Y?)rr",
- "VPERM2F128rr",
- "VPERM2I128rr",
- "VPERMPDYri",
- "VPERMQYri",
+def: InstRW<[BWWriteResGroup28], (instregex "VPBROADCASTBrr",
+ "VPBROADCASTWrr",
"VPMOVSXBDYrr",
"VPMOVSXBQYrr",
"VPMOVSXBWYrr",
Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=330523&r1=330522&r2=330523&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Sat Apr 21 13:45:12 2018
@@ -702,7 +702,6 @@ def HWWriteResGroup4 : SchedWriteRes<[HW
def: InstRW<[HWWriteResGroup4], (instregex "MMX_MOVD64rr",
"MMX_MOVD64to64rr",
"MMX_MOVQ2DQrr",
- "VBROADCASTSSrr",
"(V?)MOV64toPQIrr",
"(V?)MOVAPD(Y?)rr",
"(V?)MOVAPS(Y?)rr",
@@ -710,8 +709,6 @@ def: InstRW<[HWWriteResGroup4], (instreg
"(V?)MOVUPD(Y?)rr",
"(V?)MOVUPS(Y?)rr",
"(V?)PBLENDW(Y?)rri",
- "VPBROADCASTDrr",
- "VPBROADCASTQrr",
"(V?)PSLLDQ(Y?)ri",
"(V?)PSRLDQ(Y?)ri")>;
@@ -1503,22 +1500,8 @@ def HWWriteResGroup51 : SchedWriteRes<[H
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[HWWriteResGroup51], (instregex "VBROADCASTSDYrr",
- "VBROADCASTSSYrr",
- "VEXTRACTF128rr",
- "VEXTRACTI128rr",
- "VINSERTF128rr",
- "VINSERTI128rr",
- "VPBROADCASTBYrr",
- "VPBROADCASTBrr",
- "VPBROADCASTDYrr",
- "VPBROADCASTQYrr",
- "VPBROADCASTWYrr",
+def: InstRW<[HWWriteResGroup51], (instregex "VPBROADCASTBrr",
"VPBROADCASTWrr",
- "VPERM2F128rr",
- "VPERM2I128rr",
- "VPERMPDYri",
- "VPERMQYri",
"VPMOVSXBDYrr",
"VPMOVSXBQYrr",
"VPMOVSXBWYrr",
Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td?rev=330523&r1=330522&r2=330523&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeClient.td Sat Apr 21 13:45:12 2018
@@ -362,12 +362,9 @@ def: InstRW<[SKLWriteResGroup3], (instre
"MMX_MOVD64to64rr",
"UCOM_FPr",
"UCOM_Fr",
- "VBROADCASTSSrr",
"(V?)MOV64toPQIrr",
"(V?)MOVDI2PDIrr",
"(V?)PBLENDW(Y?)rri",
- "VPBROADCASTDrr",
- "VPBROADCASTQrr",
"(V?)PSLLDQ(Y?)ri",
"(V?)PSRLDQ(Y?)ri")>;
@@ -772,21 +769,9 @@ def: InstRW<[SKLWriteResGroup30], (instr
"SUB_FPrST0",
"SUB_FST0r",
"SUB_FrST0",
- "VBROADCASTSDYrr",
- "VBROADCASTSSYrr",
- "VEXTRACTF128rr",
- "VEXTRACTI128rr",
- "VINSERTF128rr",
- "VINSERTI128rr",
"VPBROADCASTBrr",
- "VPBROADCASTDYrr",
- "VPBROADCASTQYrr",
- "VPBROADCASTW(Y?)rr",
+ "VPBROADCASTWrr",
"(V?)PCMPGTQ(Y?)rr",
- "VPERM2F128rr",
- "VPERM2I128rr",
- "VPERMPDYri",
- "VPERMQYri",
"VPMOVSXBDYrr",
"VPMOVSXBQYrr",
"VPMOVSXBWYrr",
Modified: llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td?rev=330523&r1=330522&r2=330523&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedSkylakeServer.td Sat Apr 21 13:45:12 2018
@@ -411,16 +411,12 @@ def: InstRW<[SKXWriteResGroup3], (instre
"PSRLDQri",
"UCOM_FPr",
"UCOM_Fr",
- "VBROADCASTI32X2Z128r",
- "VBROADCASTSSrr",
"VMOV64toPQIZrr",
"VMOV64toPQIrr",
"VMOVDI2PDIZrr",
"VMOVDI2PDIrr",
"VPBLENDWYrri",
"VPBLENDWrri",
- "VPBROADCASTDrr",
- "VPBROADCASTQrr",
"VPSLLDQYri",
"VPSLLDQZ128rr",
"VPSLLDQZ256rr",
@@ -1372,17 +1368,6 @@ def: InstRW<[SKXWriteResGroup32], (instr
"VALIGNQZ128rri",
"VALIGNQZ256rri",
"VALIGNQZrri",
- "VBROADCASTF32X2Z256r",
- "VBROADCASTF32X2Zr",
- "VBROADCASTI32X2Z256r",
- "VBROADCASTI32X2Zr",
- "VBROADCASTSDYrr",
- "VBROADCASTSDZ256r",
- "VBROADCASTSDZr",
- "VBROADCASTSSYrr",
- "VBROADCASTSSZ128r",
- "VBROADCASTSSZ256r",
- "VBROADCASTSSZr",
"VCMPPDZ128rri",
"VCMPPDZ256rri",
"VCMPPDZrri",
@@ -1394,20 +1379,6 @@ def: InstRW<[SKXWriteResGroup32], (instr
"VDBPSADBWZ128rri",
"VDBPSADBWZ256rri",
"VDBPSADBWZrri",
- "VEXTRACTF128rr",
- "VEXTRACTF32x4Z256rr",
- "VEXTRACTF32x4Zrr",
- "VEXTRACTF32x8Zrr",
- "VEXTRACTF64x2Z256rr",
- "VEXTRACTF64x2Zrr",
- "VEXTRACTF64x4Zrr",
- "VEXTRACTI128rr",
- "VEXTRACTI32x4Z256rr",
- "VEXTRACTI32x4Zrr",
- "VEXTRACTI32x8Zrr",
- "VEXTRACTI64x2Z256rr",
- "VEXTRACTI64x2Zrr",
- "VEXTRACTI64x4Zrr",
"VFPCLASSPDZ128rr",
"VFPCLASSPDZ256rr",
"VFPCLASSPDZrr",
@@ -1416,43 +1387,7 @@ def: InstRW<[SKXWriteResGroup32], (instr
"VFPCLASSPSZrr",
"VFPCLASSSDrr",
"VFPCLASSSSrr",
- "VINSERTF128rr",
- "VINSERTF32x4Z256rr",
- "VINSERTF32x4Zrr",
- "VINSERTF32x8Zrr",
- "VINSERTF64x2Z256rr",
- "VINSERTF64x2Zrr",
- "VINSERTF64x4Zrr",
- "VINSERTI128rr",
- "VINSERTI32x4Z256rr",
- "VINSERTI32x4Zrr",
- "VINSERTI32x8Zrr",
- "VINSERTI64x2Z256rr",
- "VINSERTI64x2Zrr",
- "VINSERTI64x4Zrr",
- "VPBROADCASTBYrr",
- "VPBROADCASTBZ128r",
- "VPBROADCASTBZ256r",
- "VPBROADCASTBZr",
"VPBROADCASTBrr",
- "VPBROADCASTDYrr",
- "VPBROADCASTDZ128r",
- "VPBROADCASTDZ256r",
- "VPBROADCASTDZr",
- "VPBROADCASTDrZ128r",
- "VPBROADCASTDrZ256r",
- "VPBROADCASTDrZr",
- "VPBROADCASTQYrr",
- "VPBROADCASTQZ128r",
- "VPBROADCASTQZ256r",
- "VPBROADCASTQZr",
- "VPBROADCASTQrZ128r",
- "VPBROADCASTQrZ256r",
- "VPBROADCASTQrZr",
- "VPBROADCASTWYrr",
- "VPBROADCASTWZ128r",
- "VPBROADCASTWZ256r",
- "VPBROADCASTWZr",
"VPBROADCASTWrr",
"VPCMPBZ128rri",
"VPCMPBZ256rri",
@@ -1504,14 +1439,6 @@ def: InstRW<[SKXWriteResGroup32], (instr
"VPCMPWZ128rri",
"VPCMPWZ256rri",
"VPCMPWZrri",
- "VPERM2F128rr",
- "VPERM2I128rr",
- "VPERMPDYri",
- "VPERMPDZ256ri",
- "VPERMPDZri",
- "VPERMQYri",
- "VPERMQZ256ri",
- "VPERMQZri",
"VPMAXSQZ128rr",
"VPMAXSQZ256rr",
"VPMAXSQZrr",
@@ -1599,15 +1526,7 @@ def: InstRW<[SKXWriteResGroup32], (instr
"VPTESTNMQZrr",
"VPTESTNMWZ128rr",
"VPTESTNMWZ256rr",
- "VPTESTNMWZrr",
- "VSHUFF32X4Z256rri",
- "VSHUFF32X4Zrri",
- "VSHUFF64X2Z256rri",
- "VSHUFF64X2Zrri",
- "VSHUFI32X4Z256rri",
- "VSHUFI32X4Zrri",
- "VSHUFI64X2Z256rri",
- "VSHUFI64X2Zrri")>;
+ "VPTESTNMWZrr")>;
def SKXWriteResGroup33 : SchedWriteRes<[SKXPort0,SKXPort5]> {
let Latency = 3;
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