[llvm] r330516 - [InstSimplify] move tests for shifts; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 21 09:58:00 PDT 2018
Author: spatel
Date: Sat Apr 21 09:58:00 2018
New Revision: 330516
URL: http://llvm.org/viewvc/llvm-project?rev=330516&view=rev
Log:
[InstSimplify] move tests for shifts; NFC
Added:
llvm/trunk/test/Transforms/InstSimplify/shift.ll
Modified:
llvm/trunk/test/Transforms/InstCombine/apint-shift.ll
llvm/trunk/test/Transforms/InstCombine/shift.ll
llvm/trunk/test/Transforms/InstSimplify/shr-nop.ll
Modified: llvm/trunk/test/Transforms/InstCombine/apint-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/apint-shift.ll?rev=330516&r1=330515&r2=330516&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/apint-shift.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/apint-shift.ll Sat Apr 21 09:58:00 2018
@@ -3,56 +3,6 @@
; even with arbitrary precision integers.
; RUN: opt < %s -instcombine -S | FileCheck %s
-define i47 @test1(i47 %A) {
-; CHECK-LABEL: @test1(
-; CHECK-NEXT: ret i47 %A
-;
- %B = shl i47 %A, 0
- ret i47 %B
-}
-
-define i41 @test2(i7 %X) {
-; CHECK-LABEL: @test2(
-; CHECK-NEXT: ret i41 0
-;
- %A = zext i7 %X to i41
- %B = shl i41 0, %A
- ret i41 %B
-}
-
-define i41 @test3(i41 %A) {
-; CHECK-LABEL: @test3(
-; CHECK-NEXT: ret i41 %A
-;
- %B = ashr i41 %A, 0
- ret i41 %B
-}
-
-define i39 @test4(i7 %X) {
-; CHECK-LABEL: @test4(
-; CHECK-NEXT: ret i39 0
-;
- %A = zext i7 %X to i39
- %B = ashr i39 0, %A
- ret i39 %B
-}
-
-define i55 @test5(i55 %A) {
-; CHECK-LABEL: @test5(
-; CHECK-NEXT: ret i55 undef
-;
- %B = lshr i55 %A, 55
- ret i55 %B
-}
-
-define i32 @test5a(i32 %A) {
-; CHECK-LABEL: @test5a(
-; CHECK-NEXT: ret i32 undef
-;
- %B = shl i32 %A, 32
- ret i32 %B
-}
-
define i55 @test6(i55 %A) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: [[C:%.*]] = mul i55 %A, 6
Modified: llvm/trunk/test/Transforms/InstCombine/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/shift.ll?rev=330516&r1=330515&r2=330516&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/shift.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/shift.ll Sat Apr 21 09:58:00 2018
@@ -1,114 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
-define i32 @test1(i32 %A) {
-; CHECK-LABEL: @test1(
-; CHECK-NEXT: ret i32 %A
-;
- %B = shl i32 %A, 0
- ret i32 %B
-}
-
-define i32 @test2(i8 %A) {
-; CHECK-LABEL: @test2(
-; CHECK-NEXT: ret i32 0
-;
- %shift.upgrd.1 = zext i8 %A to i32
- %B = shl i32 0, %shift.upgrd.1
- ret i32 %B
-}
-
-define i32 @test3(i32 %A) {
-; CHECK-LABEL: @test3(
-; CHECK-NEXT: ret i32 %A
-;
- %B = ashr i32 %A, 0
- ret i32 %B
-}
-
-define i32 @test4(i8 %A) {
-; CHECK-LABEL: @test4(
-; CHECK-NEXT: ret i32 0
-;
- %shift.upgrd.2 = zext i8 %A to i32
- %B = ashr i32 0, %shift.upgrd.2
- ret i32 %B
-}
-
-define i32 @test5(i32 %A) {
-; CHECK-LABEL: @test5(
-; CHECK-NEXT: ret i32 undef
-;
- %B = lshr i32 %A, 32 ;; shift all bits out
- ret i32 %B
-}
-
-define <4 x i32> @test5_splat_vector(<4 x i32> %A) {
-; CHECK-LABEL: @test5_splat_vector(
-; CHECK-NEXT: ret <4 x i32> undef
-;
- %B = lshr <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift all bits out
- ret <4 x i32> %B
-}
-
-define <4 x i32> @test5_zero_vector(<4 x i32> %A) {
-; CHECK-LABEL: @test5_zero_vector(
-; CHECK-NEXT: ret <4 x i32> %A
-;
- %B = lshr <4 x i32> %A, zeroinitializer
- ret <4 x i32> %B
-}
-
-define <4 x i32> @test5_non_splat_vector(<4 x i32> %A) {
-; CHECK-LABEL: @test5_non_splat_vector(
-; CHECK-NEXT: [[B:%.*]] = lshr <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
+define <4 x i32> @lshr_non_splat_vector(<4 x i32> %A) {
+; CHECK-LABEL: @lshr_non_splat_vector(
+; CHECK-NEXT: [[B:%.*]] = lshr <4 x i32> [[A:%.*]], <i32 32, i32 1, i32 2, i32 3>
; CHECK-NEXT: ret <4 x i32> [[B]]
;
%B = lshr <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
ret <4 x i32> %B
}
-define i32 @test5a(i32 %A) {
-; CHECK-LABEL: @test5a(
-; CHECK-NEXT: ret i32 undef
-;
- %B = shl i32 %A, 32 ;; shift all bits out
- ret i32 %B
-}
-
-define <4 x i32> @test5a_splat_vector(<4 x i32> %A) {
-; CHECK-LABEL: @test5a_splat_vector(
-; CHECK-NEXT: ret <4 x i32> undef
-;
- %B = shl <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift all bits out
- ret <4 x i32> %B
-}
-
-define <4 x i32> @test5a_non_splat_vector(<4 x i32> %A) {
-; CHECK-LABEL: @test5a_non_splat_vector(
-; CHECK-NEXT: [[B:%.*]] = shl <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
+define <4 x i32> @shl_non_splat_vector(<4 x i32> %A) {
+; CHECK-LABEL: @shl_non_splat_vector(
+; CHECK-NEXT: [[B:%.*]] = shl <4 x i32> [[A:%.*]], <i32 32, i32 1, i32 2, i32 3>
; CHECK-NEXT: ret <4 x i32> [[B]]
;
%B = shl <4 x i32> %A, <i32 32, i32 1, i32 2, i32 3>
ret <4 x i32> %B
}
-define i32 @test5b() {
-; CHECK-LABEL: @test5b(
-; CHECK-NEXT: ret i32 0
-;
- %B = ashr i32 undef, 2 ;; top two bits must be equal, so not undef
- ret i32 %B
-}
-
-define i32 @test5b2(i32 %A) {
-; CHECK-LABEL: @test5b2(
-; CHECK-NEXT: ret i32 0
-;
- %B = ashr i32 undef, %A ;; top %A bits must be equal, so not undef
- ret i32 %B
-}
-
define i32 @test6(i32 %A) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: [[C:%.*]] = mul i32 %A, 6
@@ -129,15 +39,6 @@ define i32 @test6a(i32 %A) {
ret i32 %C
}
-define i32 @test7(i8 %A) {
-; CHECK-LABEL: @test7(
-; CHECK-NEXT: ret i32 -1
-;
- %shift.upgrd.3 = zext i8 %A to i32
- %B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
- ret i32 %B
-}
-
;; (A << 5) << 3 === A << 8 == 0
define i8 @test8(i8 %A) {
; CHECK-LABEL: @test8(
Added: llvm/trunk/test/Transforms/InstSimplify/shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/shift.ll?rev=330516&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstSimplify/shift.ll (added)
+++ llvm/trunk/test/Transforms/InstSimplify/shift.ll Sat Apr 21 09:58:00 2018
@@ -0,0 +1,107 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instsimplify -S | FileCheck %s
+
+define i47 @shl_by_0(i47 %A) {
+; CHECK-LABEL: @shl_by_0(
+; CHECK-NEXT: ret i47 [[A:%.*]]
+;
+ %B = shl i47 %A, 0
+ ret i47 %B
+}
+
+define i41 @shl_0(i41 %X) {
+; CHECK-LABEL: @shl_0(
+; CHECK-NEXT: ret i41 0
+;
+ %B = shl i41 0, %X
+ ret i41 %B
+}
+
+define i41 @ashr_by_0(i41 %A) {
+; CHECK-LABEL: @ashr_by_0(
+; CHECK-NEXT: ret i41 [[A:%.*]]
+;
+ %B = ashr i41 %A, 0
+ ret i41 %B
+}
+
+define i39 @ashr_0(i39 %X) {
+; CHECK-LABEL: @ashr_0(
+; CHECK-NEXT: ret i39 0
+;
+ %B = ashr i39 0, %X
+ ret i39 %B
+}
+
+define i55 @lshr_by_bitwidth(i55 %A) {
+; CHECK-LABEL: @lshr_by_bitwidth(
+; CHECK-NEXT: ret i55 undef
+;
+ %B = lshr i55 %A, 55
+ ret i55 %B
+}
+
+define i32 @shl_by_bitwidth(i32 %A) {
+; CHECK-LABEL: @shl_by_bitwidth(
+; CHECK-NEXT: ret i32 undef
+;
+ %B = shl i32 %A, 32
+ ret i32 %B
+}
+
+define <4 x i32> @lshr_by_bitwidth_splat(<4 x i32> %A) {
+; CHECK-LABEL: @lshr_by_bitwidth_splat(
+; CHECK-NEXT: ret <4 x i32> undef
+;
+ %B = lshr <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift all bits out
+ ret <4 x i32> %B
+}
+
+define <4 x i32> @lshr_by_0_splat(<4 x i32> %A) {
+; CHECK-LABEL: @lshr_by_0_splat(
+; CHECK-NEXT: ret <4 x i32> [[A:%.*]]
+;
+ %B = lshr <4 x i32> %A, zeroinitializer
+ ret <4 x i32> %B
+}
+
+define <4 x i32> @shl_by_bitwidth_splat(<4 x i32> %A) {
+; CHECK-LABEL: @shl_by_bitwidth_splat(
+; CHECK-NEXT: ret <4 x i32> undef
+;
+ %B = shl <4 x i32> %A, <i32 32, i32 32, i32 32, i32 32> ;; shift all bits out
+ ret <4 x i32> %B
+}
+
+define i32 @ashr_undef() {
+; CHECK-LABEL: @ashr_undef(
+; CHECK-NEXT: ret i32 0
+;
+ %B = ashr i32 undef, 2 ;; top two bits must be equal, so not undef
+ ret i32 %B
+}
+
+define i32 @ashr_undef_variable_shift_amount(i32 %A) {
+; CHECK-LABEL: @ashr_undef_variable_shift_amount(
+; CHECK-NEXT: ret i32 0
+;
+ %B = ashr i32 undef, %A ;; top %A bits must be equal, so not undef
+ ret i32 %B
+}
+
+define i32 @ashr_all_ones(i32 %A) {
+; CHECK-LABEL: @ashr_all_ones(
+; CHECK-NEXT: ret i32 -1
+;
+ %B = ashr i32 -1, %A
+ ret i32 %B
+}
+
+define <3 x i8> @ashr_all_ones_vec_with_undef_elts(<3 x i8> %x, <3 x i8> %y) {
+; CHECK-LABEL: @ashr_all_ones_vec_with_undef_elts(
+; CHECK-NEXT: ret <3 x i8> <i8 -1, i8 -1, i8 -1>
+;
+ %sh = ashr <3 x i8> <i8 undef, i8 -1, i8 undef>, %y
+ ret <3 x i8> %sh
+}
+
Modified: llvm/trunk/test/Transforms/InstSimplify/shr-nop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstSimplify/shr-nop.ll?rev=330516&r1=330515&r2=330516&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstSimplify/shr-nop.ll (original)
+++ llvm/trunk/test/Transforms/InstSimplify/shr-nop.ll Sat Apr 21 09:58:00 2018
@@ -193,14 +193,6 @@ define i1 @ashr_ne_first_zero(i8 %a) {
ret i1 %cmp
}
-define <3 x i8> @ashr_all_ones_vec_with_undef_elts(<3 x i8> %x, <3 x i8> %y) {
-; CHECK-LABEL: @ashr_all_ones_vec_with_undef_elts(
-; CHECK-NEXT: ret <3 x i8> <i8 -1, i8 -1, i8 -1>
-;
- %sh = ashr <3 x i8> <i8 undef, i8 -1, i8 undef>, %y
- ret <3 x i8> %sh
-}
-
define i1 @ashr_eq_both_minus1(i8 %a) {
; CHECK-LABEL: @ashr_eq_both_minus1(
; CHECK-NEXT: ret i1 true
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