[llvm] r330514 - [X86][Haswell] Strip unnecessary WriteFAdd/WriteFHAdd instruction instrw overrides.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 21 09:20:28 PDT 2018
Author: rksimon
Date: Sat Apr 21 09:20:28 2018
New Revision: 330514
URL: http://llvm.org/viewvc/llvm-project?rev=330514&view=rev
Log:
[X86][Haswell] Strip unnecessary WriteFAdd/WriteFHAdd instruction instrw overrides.
Modified:
llvm/trunk/lib/Target/X86/X86SchedHaswell.td
Modified: llvm/trunk/lib/Target/X86/X86SchedHaswell.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86SchedHaswell.td?rev=330514&r1=330513&r2=330514&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86SchedHaswell.td (original)
+++ llvm/trunk/lib/Target/X86/X86SchedHaswell.td Sat Apr 21 09:20:28 2018
@@ -1582,19 +1582,9 @@ def: InstRW<[HWWriteResGroup50], (instre
"PEXT(32|64)rr",
"SHLD(16|32|64)rri8",
"SHRD(16|32|64)rri8",
- "(V?)ADDPD(Y?)rr",
- "(V?)ADDPS(Y?)rr",
- "(V?)ADDSDrr",
- "(V?)ADDSSrr",
- "(V?)ADDSUBPD(Y?)rr",
- "(V?)ADDSUBPS(Y?)rr",
"(V?)CVTDQ2PS(Y?)rr",
"(V?)CVTPS2DQ(Y?)rr",
- "(V?)CVTTPS2DQ(Y?)rr",
- "(V?)SUBPD(Y?)rr",
- "(V?)SUBPS(Y?)rr",
- "(V?)SUBSDrr",
- "(V?)SUBSSrr")>;
+ "(V?)CVTTPS2DQ(Y?)rr")>;
def HWWriteResGroup50_16i : SchedWriteRes<[HWPort1, HWPort0156]> {
let Latency = 4;
@@ -2227,11 +2217,7 @@ def HWWriteResGroup93 : SchedWriteRes<[H
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
-def: InstRW<[HWWriteResGroup93], (instregex "(V?)CVTSI642SSrr",
- "(V?)HADDPD(Y?)rr",
- "(V?)HADDPS(Y?)rr",
- "(V?)HSUBPD(Y?)rr",
- "(V?)HSUBPS(Y?)rr")>;
+def: InstRW<[HWWriteResGroup93], (instregex "(V?)CVTSI642SSrr")>;
def HWWriteResGroup94 : SchedWriteRes<[HWPort1,HWPort6,HWPort06]> {
let Latency = 5;
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