[llvm] r330424 - [X86] Tag CLDEMOTE instruction with WriteLoad scheduling class

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Fri Apr 20 05:54:53 2018
New Revision: 330424

URL: http://llvm.org/viewvc/llvm-project?rev=330424&view=rev
Log:
[X86] Tag CLDEMOTE instruction with WriteLoad scheduling class

Same as other cacheline instructions

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.td

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=330424&r1=330423&r2=330424&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Fri Apr 20 05:54:53 2018
@@ -2726,8 +2726,9 @@ let Predicates = [HasCLWB], SchedRW = [W
 def CLWB       : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src",
                    [(int_x86_clwb addr:$src)]>, PD;
 
+let Predicates = [HasCLDEMOTE], SchedRW = [WriteLoad] in
 def CLDEMOTE : I<0x1C, MRM0m, (outs), (ins i8mem:$src), "cldemote\t$src",
-                   [(int_x86_cldemote addr:$src)]>, TB, Requires<[HasCLDEMOTE]>;
+                   [(int_x86_cldemote addr:$src)]>, TB;
 
 //===----------------------------------------------------------------------===//
 // Subsystems.