[PATCH] D45813: Revert "This pass, fixing an erratum in some LEON 2 processors..."

Daniel Cederman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 20 00:58:00 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL330397: Revert "This pass, fixing an erratum in some LEON 2 processors..." (authored by dcederman, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D45813?vs=143080&id=143245#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D45813

Files:
  llvm/trunk/lib/Target/Sparc/LeonFeatures.td
  llvm/trunk/lib/Target/Sparc/Sparc.td
  llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
  llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
  llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
  llvm/trunk/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll


Index: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
===================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -362,12 +362,6 @@
 
     // FIXME: Handle div by immediate.
     unsigned Opcode = N->getOpcode() == ISD::SDIV ? SP::SDIVrr : SP::UDIVrr;
-    // SDIV is a hardware erratum on some LEON2 processors. Replace it with SDIVcc here.
-    if (((SparcTargetMachine&)TM).getSubtargetImpl()->performSDIVReplace()
-        &&
-        Opcode == SP::SDIVrr) {
-      Opcode = SP::SDIVCCrr;
-    }
     CurDAG->SelectNodeTo(N, Opcode, MVT::i32, DivLHS, DivRHS, TopPart);
     return;
   }
Index: llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
===================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
@@ -44,7 +44,6 @@
   // Leon features
   HasLeonCasa = false;
   HasUmacSmac = false;
-  PerformSDIVReplace = false;
   InsertNOPLoad = false;
   FixAllFDIVSQRT = false;
   DetectRoundChange = false;
Index: llvm/trunk/lib/Target/Sparc/LeonFeatures.td
===================================================================
--- llvm/trunk/lib/Target/Sparc/LeonFeatures.td
+++ llvm/trunk/lib/Target/Sparc/LeonFeatures.td
@@ -37,14 +37,6 @@
   "Enable CASA instruction for LEON3 and LEON4 processors"
 >;
 
-
-def ReplaceSDIV : SubtargetFeature<
-  "replacesdiv",
-  "PerformSDIVReplace",
-  "true",
-  "AT697E erratum fix: Do not emit SDIV, emit SDIVCC instead"
->;
-          
 def InsertNOPLoad: SubtargetFeature<
   "insertnopload",
   "InsertNOPLoad",
Index: llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
===================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
@@ -50,7 +50,6 @@
   bool InsertNOPLoad;
   bool FixAllFDIVSQRT;
   bool DetectRoundChange;
-  bool PerformSDIVReplace;
 
   SparcInstrInfo InstrInfo;
   SparcTargetLowering TLInfo;
@@ -92,7 +91,6 @@
 
   // Leon options
   bool hasUmacSmac() const { return HasUmacSmac; }
-  bool performSDIVReplace() const { return PerformSDIVReplace; }
   bool hasLeonCasa() const { return HasLeonCasa; }
   bool insertNOPLoad() const { return InsertNOPLoad; }
   bool fixAllFDIVSQRT() const { return FixAllFDIVSQRT; }
Index: llvm/trunk/lib/Target/Sparc/Sparc.td
===================================================================
--- llvm/trunk/lib/Target/Sparc/Sparc.td
+++ llvm/trunk/lib/Target/Sparc/Sparc.td
@@ -130,7 +130,7 @@
 // LEON 2 FT (AT697E)
 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
 def : Processor<"at697e", LEON2Itineraries,
-                [FeatureLeon, ReplaceSDIV, InsertNOPLoad]>;
+                [FeatureLeon, InsertNOPLoad]>;
 
 // LEON 2 FT (AT697F)
 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
Index: llvm/trunk/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll
===================================================================
--- llvm/trunk/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll
+++ llvm/trunk/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll
@@ -1,11 +0,0 @@
-; RUN: llc %s -O0 -march=sparc -o - | FileCheck %s -check-prefix=NO_REPLACE_SDIV
-; RUN: llc %s -O0 -march=sparc -mcpu=at697e -o - | FileCheck %s -check-prefix=REPLACE_SDIV
-
-; REPLACE_SDIV: sdivcc %o0, %o1, %o0
-; NO_REPLACE_SDIV: sdiv %o0, %o1, %o0
-
-define i32 @lbr59(i32 %a, i32 %b)
-{
-  %r = sdiv i32 %a, %b
-  ret i32 %r 
-}


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