[llvm] r330392 - [Sparc] Fix addressing mode when using 64-bit values in inline assembly
Daniel Cederman via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 19 23:57:49 PDT 2018
Author: dcederman
Date: Thu Apr 19 23:57:49 2018
New Revision: 330392
URL: http://llvm.org/viewvc/llvm-project?rev=330392&view=rev
Log:
[Sparc] Fix addressing mode when using 64-bit values in inline assembly
Summary:
If a 64-bit register is used as an operand in inline assembly together
with a memory reference, the memory addressing will be wrong. The
addressing will be a single reg, instead of reg+reg or reg+imm. This
will generate a bad offset value or an exception in printMemOperand().
For example:
```
long long int val = 5;
long long int mem;
__asm__ volatile ("std %1, %0":"=m"(mem):"r"(val));
```
becomes:
```
std %i0, [%i2+589833]
```
The problem is that SelectInlineAsmMemoryOperand() is never called for
the memory references if one of the operands is a 64-bit register.
By calling SelectInlineAsmMemoryOperands() in tryInlineAsm() the Sparc
version of SelectInlineAsmMemoryOperand() gets called for each memory
reference.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D45761
Modified:
llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
llvm/trunk/test/CodeGen/SPARC/inlineasm.ll
Modified: llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp?rev=330392&r1=330391&r2=330392&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcISelDAGToDAG.cpp Thu Apr 19 23:57:49 2018
@@ -311,6 +311,8 @@ bool SparcDAGToDAGISel::tryInlineAsm(SDN
if (!Changed)
return false;
+ SelectInlineAsmMemoryOperands(AsmNodeOperands, SDLoc(N));
+
SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N),
CurDAG->getVTList(MVT::Other, MVT::Glue), AsmNodeOperands);
New->setNodeId(-1);
Modified: llvm/trunk/test/CodeGen/SPARC/inlineasm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/inlineasm.ll?rev=330392&r1=330391&r2=330392&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/inlineasm.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/inlineasm.ll Thu Apr 19 23:57:49 2018
@@ -112,3 +112,11 @@ entry:
%2 = tail call double asm sideeffect "faddd $1, $2, $0;", "=f,f,e"(double %0, double %1) #7
ret double %2
}
+
+; CHECK-LABEL: test_addressing_mode_i64:
+; CHECK: std %l0, [%o0]
+define void @test_addressing_mode_i64(i64* %out) {
+entry:
+ call void asm "std %l0, $0", "=*m,r"(i64* nonnull %out, i64 0)
+ ret void
+}
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