[llvm] r330325 - [NFC][InstCombine] A few more tests for masked merge add/xor -> or with constant mask
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 19 06:02:17 PDT 2018
Author: lebedevri
Date: Thu Apr 19 06:02:17 2018
New Revision: 330325
URL: http://llvm.org/viewvc/llvm-project?rev=330325&view=rev
Log:
[NFC][InstCombine] A few more tests for masked merge add/xor -> or with constant mask
Modified:
llvm/trunk/test/Transforms/InstCombine/masked-merge-add.ll
llvm/trunk/test/Transforms/InstCombine/masked-merge-or.ll
llvm/trunk/test/Transforms/InstCombine/masked-merge-xor.ll
Modified: llvm/trunk/test/Transforms/InstCombine/masked-merge-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/masked-merge-add.ll?rev=330325&r1=330324&r2=330325&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/masked-merge-add.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/masked-merge-add.ll Thu Apr 19 06:02:17 2018
@@ -118,6 +118,62 @@ define <3 x i32> @p_constmask_vec_undef(
}
; ============================================================================ ;
+; Constant mask with no common bits set, but common unset bits.
+; ============================================================================ ;
+
+define i32 @p_constmask2(i32 %x, i32 %y) {
+; CHECK-LABEL: @p_constmask2(
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 61440
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
+; CHECK-NEXT: [[RET:%.*]] = or i32 [[AND]], [[AND1]]
+; CHECK-NEXT: ret i32 [[RET]]
+;
+ %and = and i32 %x, 61440
+ %and1 = and i32 %y, -65281
+ %ret = add i32 %and, %and1
+ ret i32 %ret
+}
+
+define <2 x i32> @p_constmask2_splatvec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_splatvec(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 61440, i32 61440>
+; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -65281>
+; CHECK-NEXT: [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <2 x i32> [[RET]]
+;
+ %and = and <2 x i32> %x, <i32 61440, i32 61440>
+ %and1 = and <2 x i32> %y, <i32 -65281, i32 -65281>
+ %ret = add <2 x i32> %and, %and1
+ ret <2 x i32> %ret
+}
+
+define <2 x i32> @p_constmask2_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_vec(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 61440, i32 16711680>
+; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -16776961>
+; CHECK-NEXT: [[RET:%.*]] = add <2 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <2 x i32> [[RET]]
+;
+ %and = and <2 x i32> %x, <i32 61440, i32 16711680>
+ %and1 = and <2 x i32> %y, <i32 -65281, i32 -16776961>
+ %ret = add <2 x i32> %and, %and1
+ ret <2 x i32> %ret
+}
+
+define <3 x i32> @p_constmask2_vec_undef(<3 x i32> %x, <3 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_vec_undef(
+; CHECK-NEXT: [[AND:%.*]] = and <3 x i32> [[X:%.*]], <i32 61440, i32 undef, i32 61440>
+; CHECK-NEXT: [[AND1:%.*]] = and <3 x i32> [[Y:%.*]], <i32 -65281, i32 undef, i32 -65281>
+; CHECK-NEXT: [[RET:%.*]] = add <3 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <3 x i32> [[RET]]
+;
+ %and = and <3 x i32> %x, <i32 61440, i32 undef, i32 61440>
+ %and1 = and <3 x i32> %y, <i32 -65281, i32 undef, i32 -65281>
+ %ret = add <3 x i32> %and, %and1
+ ret <3 x i32> %ret
+}
+
+; ============================================================================ ;
; Commutativity.
; ============================================================================ ;
@@ -340,7 +396,20 @@ define i32 @n3_constmask_badmask(i32 %x,
; CHECK-NEXT: ret i32 [[RET]]
;
%and = and i32 %x, 65280
- %and1 = and i32 %y, -65280 ; not -65281
+ %and1 = and i32 %y, -65280 ; not -65281, so they have one common bit set
+ %ret = add i32 %and, %and1
+ ret i32 %ret
+}
+
+define i32 @n3_constmask_samemask(i32 %x, i32 %y) {
+; CHECK-LABEL: @n3_constmask_samemask(
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], 65280
+; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[AND]], [[AND1]]
+; CHECK-NEXT: ret i32 [[RET]]
+;
+ %and = and i32 %x, 65280
+ %and1 = and i32 %y, 65280 ; both masks are the same
%ret = add i32 %and, %and1
ret i32 %ret
}
Modified: llvm/trunk/test/Transforms/InstCombine/masked-merge-or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/masked-merge-or.ll?rev=330325&r1=330324&r2=330325&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/masked-merge-or.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/masked-merge-or.ll Thu Apr 19 06:02:17 2018
@@ -118,6 +118,62 @@ define <3 x i32> @p_constmask_vec_undef(
}
; ============================================================================ ;
+; Constant mask with no common bits set, but common unset bits.
+; ============================================================================ ;
+
+define i32 @p_constmask2(i32 %x, i32 %y) {
+; CHECK-LABEL: @p_constmask2(
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 61440
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
+; CHECK-NEXT: [[RET:%.*]] = or i32 [[AND]], [[AND1]]
+; CHECK-NEXT: ret i32 [[RET]]
+;
+ %and = and i32 %x, 61440
+ %and1 = and i32 %y, -65281
+ %ret = or i32 %and, %and1
+ ret i32 %ret
+}
+
+define <2 x i32> @p_constmask2_splatvec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_splatvec(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 61440, i32 61440>
+; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -65281>
+; CHECK-NEXT: [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <2 x i32> [[RET]]
+;
+ %and = and <2 x i32> %x, <i32 61440, i32 61440>
+ %and1 = and <2 x i32> %y, <i32 -65281, i32 -65281>
+ %ret = or <2 x i32> %and, %and1
+ ret <2 x i32> %ret
+}
+
+define <2 x i32> @p_constmask2_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_vec(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 61440, i32 16711680>
+; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -16776961>
+; CHECK-NEXT: [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <2 x i32> [[RET]]
+;
+ %and = and <2 x i32> %x, <i32 61440, i32 16711680>
+ %and1 = and <2 x i32> %y, <i32 -65281, i32 -16776961>
+ %ret = or <2 x i32> %and, %and1
+ ret <2 x i32> %ret
+}
+
+define <3 x i32> @p_constmask2_vec_undef(<3 x i32> %x, <3 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_vec_undef(
+; CHECK-NEXT: [[AND:%.*]] = and <3 x i32> [[X:%.*]], <i32 61440, i32 undef, i32 61440>
+; CHECK-NEXT: [[AND1:%.*]] = and <3 x i32> [[Y:%.*]], <i32 -65281, i32 undef, i32 -65281>
+; CHECK-NEXT: [[RET:%.*]] = or <3 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <3 x i32> [[RET]]
+;
+ %and = and <3 x i32> %x, <i32 61440, i32 undef, i32 61440>
+ %and1 = and <3 x i32> %y, <i32 -65281, i32 undef, i32 -65281>
+ %ret = or <3 x i32> %and, %and1
+ ret <3 x i32> %ret
+}
+
+; ============================================================================ ;
; Commutativity.
; ============================================================================ ;
@@ -340,7 +396,19 @@ define i32 @n3_constmask_badmask(i32 %x,
; CHECK-NEXT: ret i32 [[RET]]
;
%and = and i32 %x, 65280
- %and1 = and i32 %y, -65280 ; not -65281
+ %and1 = and i32 %y, -65280 ; not -65281, so they have one common bit
+ %ret = or i32 %and, %and1
+ ret i32 %ret
+}
+
+define i32 @n3_constmask_samemask(i32 %x, i32 %y) {
+; CHECK-LABEL: @n3_constmask_samemask(
+; CHECK-NEXT: [[AND2:%.*]] = or i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i32 [[AND2]], 65280
+; CHECK-NEXT: ret i32 [[RET]]
+;
+ %and = and i32 %x, 65280
+ %and1 = and i32 %y, 65280 ; both masks are the same
%ret = or i32 %and, %and1
ret i32 %ret
}
Modified: llvm/trunk/test/Transforms/InstCombine/masked-merge-xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/masked-merge-xor.ll?rev=330325&r1=330324&r2=330325&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/masked-merge-xor.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/masked-merge-xor.ll Thu Apr 19 06:02:17 2018
@@ -118,6 +118,62 @@ define <3 x i32> @p_constmask_vec_undef(
}
; ============================================================================ ;
+; Constant mask with no common bits set, but common unset bits.
+; ============================================================================ ;
+
+define i32 @p_constmask2(i32 %x, i32 %y) {
+; CHECK-LABEL: @p_constmask2(
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 61440
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
+; CHECK-NEXT: [[RET1:%.*]] = or i32 [[AND]], [[AND1]]
+; CHECK-NEXT: ret i32 [[RET1]]
+;
+ %and = and i32 %x, 61440
+ %and1 = and i32 %y, -65281
+ %ret = xor i32 %and, %and1
+ ret i32 %ret
+}
+
+define <2 x i32> @p_constmask2_splatvec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_splatvec(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 61440, i32 61440>
+; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -65281>
+; CHECK-NEXT: [[RET1:%.*]] = or <2 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <2 x i32> [[RET1]]
+;
+ %and = and <2 x i32> %x, <i32 61440, i32 61440>
+ %and1 = and <2 x i32> %y, <i32 -65281, i32 -65281>
+ %ret = xor <2 x i32> %and, %and1
+ ret <2 x i32> %ret
+}
+
+define <2 x i32> @p_constmask2_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_vec(
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 61440, i32 16711680>
+; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -16776961>
+; CHECK-NEXT: [[RET:%.*]] = xor <2 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <2 x i32> [[RET]]
+;
+ %and = and <2 x i32> %x, <i32 61440, i32 16711680>
+ %and1 = and <2 x i32> %y, <i32 -65281, i32 -16776961>
+ %ret = xor <2 x i32> %and, %and1
+ ret <2 x i32> %ret
+}
+
+define <3 x i32> @p_constmask2_vec_undef(<3 x i32> %x, <3 x i32> %y) {
+; CHECK-LABEL: @p_constmask2_vec_undef(
+; CHECK-NEXT: [[AND:%.*]] = and <3 x i32> [[X:%.*]], <i32 61440, i32 undef, i32 61440>
+; CHECK-NEXT: [[AND1:%.*]] = and <3 x i32> [[Y:%.*]], <i32 -65281, i32 undef, i32 -65281>
+; CHECK-NEXT: [[RET:%.*]] = xor <3 x i32> [[AND]], [[AND1]]
+; CHECK-NEXT: ret <3 x i32> [[RET]]
+;
+ %and = and <3 x i32> %x, <i32 61440, i32 undef, i32 61440>
+ %and1 = and <3 x i32> %y, <i32 -65281, i32 undef, i32 -65281>
+ %ret = xor <3 x i32> %and, %and1
+ ret <3 x i32> %ret
+}
+
+; ============================================================================ ;
; Commutativity.
; ============================================================================ ;
@@ -340,7 +396,19 @@ define i32 @n3_constmask_badmask(i32 %x,
; CHECK-NEXT: ret i32 [[RET]]
;
%and = and i32 %x, 65280
- %and1 = and i32 %y, -65280 ; not -65281
+ %and1 = and i32 %y, -65280 ; not -65281, so they have one common bit
+ %ret = xor i32 %and, %and1
+ ret i32 %ret
+}
+
+define i32 @n3_constmask_samemask(i32 %x, i32 %y) {
+; CHECK-LABEL: @n3_constmask_samemask(
+; CHECK-NEXT: [[AND2:%.*]] = xor i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i32 [[AND2]], 65280
+; CHECK-NEXT: ret i32 [[RET]]
+;
+ %and = and i32 %x, 65280
+ %and1 = and i32 %y, 65280 ; both masks are the same
%ret = xor i32 %and, %and1
ret i32 %ret
}
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