[PATCH] D45810: [Sparc] Use synthetic instruction clr to zero register instead of sethi

[Daniel Cederman via Phabricator via llvm-commits]

dcederman created this revision.
dcederman added reviewers: jyknight, venkatra.
Herald added subscribers: llvm-commits, jrtc27, fedor.sergeev, eraman.

Using `clr reg`/`mov %g0, reg`/`or %g0, %g0, reg` to zero a register looks much better than `sethi 0, reg`.


Repository:
  rL LLVM

https://reviews.llvm.org/D45810

Files:
  lib/Target/Sparc/SparcInstrInfo.td
  test/CodeGen/SPARC/atomics.ll
  test/CodeGen/SPARC/imm.ll
  test/CodeGen/SPARC/inlineasm.ll
  test/CodeGen/SPARC/vector-extract-elt.ll

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