[llvm] r330274 - [RISCV] Add specific tests for materialising imm32hi20 constants

[Alex Bradbury via llvm-commits]

Author: asb
Date: Wed Apr 18 09:43:03 2018
New Revision: 330274

URL: http://llvm.org/viewvc/llvm-project?rev=330274&view=rev
Log:
[RISCV] Add specific tests for materialising imm32hi20 constants

i.e. constants that can be materialised with a single lui, as the lower 12 
bits are zero.

Modified:
    llvm/trunk/test/CodeGen/RISCV/imm.ll

Modified: llvm/trunk/test/CodeGen/RISCV/imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/RISCV/imm.ll?rev=330274&r1=330273&r2=330274&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/RISCV/imm.ll (original)
+++ llvm/trunk/test/CodeGen/RISCV/imm.ll Wed Apr 18 09:43:03 2018
@@ -45,3 +45,19 @@ define i32 @neg_i32() nounwind {
 ; RV32I-NEXT:    ret
   ret i32 -559038737
 }
+
+define i32 @pos_i32_hi20_only() nounwind {
+; RV32I-LABEL: pos_i32_hi20_only:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    lui a0, 16
+; RV32I-NEXT:    ret
+  ret i32 65536
+}
+
+define i32 @neg_i32_hi20_only() nounwind {
+; RV32I-LABEL: neg_i32_hi20_only:
+; RV32I:       # %bb.0:
+; RV32I-NEXT:    lui a0, 1048560
+; RV32I-NEXT:    ret
+  ret i32 -65536
+}